Low power consumption oscillator circuit

• US 5,600,282 A
• Filed: 06/07/1995
• Issued: 02/04/1997
• Est. Priority Date: 05/13/1994
• Status: Expired due to Term

• Current Assignee: Apple Inc.
• Original Assignee: Apple Computer Incorporated (Apple Inc.)
• Inventors: Austin, Steven E., Kim, Stephen J., Blanc, James J.
• Primary Examiner(s): MIS, DAVID C
• Application Number:
  US08/483,287
• Time in Patent Office: 608 Days
• Field of Search: 331/111, 331/143, 331/DIG. 3, 331/517, 331/108 A, 331/185, 327/256
• US Class Current: 331/111
• CPC Class Codes: G01R 31/3648 comprising digital calculation means, e.g. for performing an algorithm
• CPC Class Codes: G01R 31/3828 using current integration
• CPC Class Codes: Y10S 320/21 State of charge of battery
• CPC Class Codes: Y10S 331/03 Logic gate active element oscillator

Abstract

A low power consumption oscillator circuit. The oscillator circuit comprises a capacitor coupled to a first resistor that is capable of delaying discharge of the capacitor. The oscillator circuit further comprises a first inverter coupled to the capacitor and having a first input. The first inverter is capable of applying charge to the capacitor when a first voltage potential on the first input is above a first threshold voltage of the first inverter. The first inverter is capable of removing charge from the capacitor when a second voltage potential on the first input is below a second threshold voltage of the first inverter. The oscillator circuit further comprises threshold detection circuitry having a second circuitry is coupled to the first input of the first inverter, and the second input is coupled to the capacitor. The threshold detection circuitry is capable of applying the first voltage potential on the first input when a third voltage potential on the second input is below a third threshold voltage of the threshold detection circuitry. The threshold detection circuitry is capable of applying the second voltage potential on the first input when a fourth voltage potential on the second input is above the third threshold voltage of the threshold detection circuitry. The third threshold voltage of the threshold detection circuitry is different than the first and second threshold voltages.

Claims

1. An oscillator comprising:

a capacitor;

a first resistor coupled to said capacitor, wherein said first resistor is capable of delaying discharge of said capacitor;

a first inverter coupled to said capacitor and having a first input, wherein said first inverter is capable of applying charge to said capacitor when a first voltage potential on said first input is above a first threshold voltage of said first inverter and wherein said first inverter is capable of removing charge from said capacitor when a second voltage potential on said first input is below a second threshold voltage of said first inverter; and

threshold detection circuitry having a second input and a second output, said second output coupled to said first input of said first inverter and said second input coupled to said capacitor, wherein said threshold detection circuitry is capable of applying said first voltage potential on said first input when a third voltage potential on said second input is below a third threshold voltage of said threshold detection circuitry, and wherein said threshold detection circuitry is capable of applying said second voltage potential on said first input when a fourth voltage potential on said second input is above said third threshold voltage of said threshold detection circuitry, wherein said third threshold voltage of said threshold detection circuitry is different than said first and second threshold voltages.

2. The oscillator of claim 1 further comprising:

a second inverter coupled to said capacitor and coupled to said first inverter, wherein said second inverter having a third input, wherein said second inverter is capable of removing charge from said capacitor when a fifth voltage potential on said third input is below a fourth threshold voltage of said second inverter and wherein said second inverter is capable of applying charge to said capacitor when a sixth voltage potential on said third input is above a fifth threshold voltage of said second inverter.

3. The oscillator of claim 1 wherein said threshold detection circuitry comprises a NMOS transistor having a drain coupled to a fifth voltage potential and said first input, having a gate coupled to said second input, and having a source coupled to a sixth voltage potential.

4. The oscillator of claim 1 wherein said threshold detection circuitry comprises a first transistor comprising a npn transistor having a first collector coupled to a fifth voltage potential and said first input, having a first base coupled to said second input, and having a first emitter coupled to a sixth voltage potential.

5. The oscillator circuit of claim 1 further comprising:

a second resistor coupled to said threshold detection circuitry, wherein said second resistor is capable of shifting said third threshold voltage of said threshold detection circuitry.

6. The oscillator of claim 1 wherein said oscillator is part of a clock generator.

7. The oscillator of claim 4, wherein said threshold detection circuitry further comprises:

a second transistor coupled to said first transistor and having a third input, wherein said second transistor applies a seventh voltage potential on said second input when an eighth voltage potential on said third input is above a fourth threshold voltage of said second transistor, and wherein said second transistor applies a ninth voltage potential on said second input when a tenth voltage potential on said third input is below said fourth threshold voltage of said second transistor.

8. The oscillator of claim 7, wherein:

said second transistor comprises a pnp transistor having a second emitter coupled to an eleventh voltage potential, a second base coupled to said third input, and a second collector coupled to said second input.

9. The oscillator of claim 1 further comprising:

a feedback circuit coupled to said second input of said threshold detection circuitry and said first output of said inverter, wherein said feedback circuit provides feedback to said second input of said threshold detection circuitry.

10. The oscillator circuit of claim 1, wherein said first threshold voltage is different than said second threshold voltage.

11. The oscillator circuit of claim 1, wherein said first threshold voltage has the same absolute value as said second threshold voltage.

12. The oscillator circuit of claim 1, wherein said oscillator circuit generates an oscillating signal having approximately equal rise and fall times.

13. An oscillator comprising:

a capacitor for storing charge;

a first resistor coupled to said capacitor, wherein said first resistor is capable of delaying discharge of said capacitor;

a first inverter coupled to said capacitor and having a first input, wherein said first inverter is capable of applying charge to said capacitor when a voltage potential on said first input is above a first threshold voltage and wherein said first inverter is capable of removing charge from said capacitor when said voltage potential on said first input is below a second threshold voltage;

a first transistor comprising an npn transistor having a first collector coupled to a third voltage potential and said first input, having a first base, and having a first emitter coupled to a fourth voltage potential, wherein said first transistor is capable of applying a first voltage potential on said first input when a voltage potential on said first base is above a threshold voltage of said first transistor, and wherein said first transistor is capable of applying a second voltage potential on said first input when said voltage potential on said first base is below said threshold voltage of said first transistor; and

a second transistor coupled to said first base and having a second input, wherein said second transistor is capable of applying a fifth voltage potential on said first base when a voltage potential on said second input is above a threshold voltage of said second transistor, and wherein said second transistor is capable of applying a sixth voltage potential on said first base when a voltage potential on said second input is below said threshold voltage of said second transistor.

14. The oscillator of claim 13 wherein said second transistor comprises of a pnp transistor having a second emitter coupled to a seventh voltage potential, having a second base coupled to said second input, and having a second collector coupled to said first base.

15. An oscillator comprising:

a capacitor for storing charge;

a first resistor coupled to said capacitor, wherein said first resistor is capable of delaying discharge of said capacitor;

a first inverter coupled to said capacitor and having a first input, wherein said first inverter is capable of applying charge to said capacitor when a voltage potential on said first input is above a first threshold voltage and wherein said first inverter is capable of removing charge from said capacitor when said voltage potential on said first input is below a second threshold voltage;

threshold detection circuitry coupled to said first input of said first inverter and coupled to said capacitor, wherein said threshold detection circuitry having a second input, wherein said threshold detection circuitry is capable of applying a first voltage potential on said first input when a voltage potential on said second input is above a threshold voltage of said threshold detection circuitry, and wherein said threshold detection circuitry is capable of applying a second voltage potential on said first input when said voltage potential on said second input is below said threshold voltage of said threshold detection circuitry; and

a feedback circuit coupled to said second input of said threshold detection circuitry and coupled to said first inverter, wherein said feedback circuit is capable of providing feedback to said second input of said threshold detection circuitry.

16. An oscillator comprising:

a capacitor;

a first resistor coupled to said capacitor, wherein said first resistor is capable of delaying discharge of said capacitor;

a first inverter coupled to said capacitor and having a first input and a first output, wherein said first inverter is capable of applying charge to said capacitor when a first voltage potential on said first input is above a first threshold voltage of said first inverter and is capable of removing charge from said capacitor when a second voltage potential on said first input is below a second threshold voltage of said first inverter; and

threshold detection circuitry having a second input and a second output, said second output coupled to said first input of said first inverter and said second input coupled to said capacitor, wherein said threshold detection circuitry is capable of applying said first voltage potential on said first input when a third voltage potential on said second input is below a third threshold voltage of said threshold detection circuitry, and wherein said threshold detection circuitry is capable of applying said second voltage potential on said first input when a fourth voltage potential on said second input is above said third threshold voltage of said threshold detection circuitry, wherein said first inverter generates a first output signal having a first rise time and a first fall time, wherein said threshold detection circuitry generates a second output signal having a second rise time and a second fall time, wherein said second rise time is less than said first rise time and said second fall time is less than said first fall time.