DC content control for an inverter

• US 5,600,548 A
• Filed: 08/11/1994
• Issued: 02/04/1997
• Est. Priority Date: 08/11/1994
• Status: Expired due to Term

• Current Assignee: Sundstrand Corporation (Rtx Corporation)
• Original Assignee: Sundstrand Corporation (Rtx Corporation)
• Inventors: Dhyanchand, P. John, Nguyen, Vietson
• Primary Examiner(s): NGUYEN, MATTHEW VAN
• Application Number:
  US08/289,485
• Time in Patent Office: 908 Days
• Field of Search: 363/40, 363/41, 363/43, 363/95, 363/97, 363/131
• US Class Current: 363/41
• CPC Class Codes: H02M 7/48 using discharge tubes with control electrode or semiconductor devices with control electrode
• CPC Class Codes: H02M 7/4803 with means for reducing DC component from AC output voltage
• CPC Class Codes: H02M 7/53873 with digital control

Abstract

A control for an inverter having a switch which is operated in accordance with a PWM waveform having spaced rising and falling edges includes circuitry which detects the magnitude and polarity of a DC component in the AC output power produced by the inverter and an adder/subtractor which adjusts at least one of a rising and falling edge of the waveform to reduce the magnitude of the DC component.

Claims

1. A control for an inverter having a switch which is operated in accordance with a waveform having spaced rising and falling edges wherein the inverter produces AC output power, comprising:

means for detecting the magnitude and polarity of a DC component in the AC output power; and

an adder/subtractor responsive to the detecting means for adjusting at least one of a rising and falling edge of the waveform to reduce the magnitude of the DC component.

2. The control of claim 1, wherein the detecting means comprises a summer which sums a signal representing the DC component with a reference to derive an error signal and an error amplifier coupled to the summer which amplifies the error signal.

3. The control of claim 2, wherein the adder/subtractor includes add/subtract inputs and a control input and wherein the detecting means further includes means for separating the amplified error signal into a magnitude signal which is coupled to the add/subtract inputs and a sign signal which is coupled to the control input.

4. The control of claim 3, wherein the add/subtract inputs further receive a series of digital words developed by a memory wherein each digital word represents intervals between rising and falling edges of a stored PWM waveform.

5. A control for a pulse-width modulated (PWM) inverter having a pair of switches which are alternately operated in accordance with a PWM control waveform having rising and falling edges to develop AC output power, comprising:

a memory having a series of digital words stored therein representing intervals between rising and falling edges of a stored PWM waveform;

means for detecting the magnitude and polarity of a DC component in the AC output power;

an adder/subtractor having a first set of add/subtract inputs coupled to the memory, a second set of add/subtract inputs which receive a signal representing the magnitude of the DC component, a control input which receives a signal representing the polarity of the DC component and an output at which a series of modified interval words are developed;

a counter which develops a counter output; and

a comparator which compares each modified interval word against the counter output to produce the PWM control waveform;

wherein a rising or falling edge of the PWM control waveform is adjusted by the adder/subtractor relative to a corresponding rising or falling edge of the stored PWM waveform to reduce the magnitude of the DC component.

6. The control of claim 5, wherein the detecting means comprises a summer which sums a signal representing the DC component with a reference to derive an error signal and an error amplifier coupled to the summer which amplifies the error signal.

7. The control of claim 6, wherein the detecting means further includes means for separating the amplified error signal into a magnitude signal which is coupled to the second set of add/subtract inputs and a sign signal which is coupled to the control input.

8. A control for a pulse-width modulated (PWM) inverter having a pair of switches which are alternately operated in accordance with a PWM control waveform having rising and falling edges to develop AC output power, comprising:

a memory having a plurality of series of digital words stored therein wherein each series represents intervals between rising and falling edges of a stored PWM waveform;

means for detecting the magnitude and polarity of a DC component in the AC output power;

an adder/subtractor having a first set of add/subtract inputs coupled to the memory, a second set of add/subtract inputs which receive a signal representing the magnitude of the DC component, a control input which receives a signal representing the polarity of the DC component and an output at which a series of modified interval words are developed;

a counter which develops a counter output; and

a comparator which compares each modified interval word against the counter output to produce the PWM control waveform;

wherein a rising or falling edge of the PWM control waveform is adjusted by the adder/subtractor relative to a corresponding rising or falling edge of the stored PWM waveform to reduce the magnitude of the DC component.

9. The control of claim 8, further including means for sensing a parameter of the AC output power and means for selecting one of the series of digital words from the memory in dependence upon the sensed parameter.

10. A method of controlling an inverter having a switch which is operated in accordance with a waveform having spaced rising and failing edges wherein the inverter produces AC output power, the method comprising the steps of:

detecting the magnitude and polarity of a DC component in the AC output power; and

providing an adder/subtractor responsive to the detecting means for adjusting at least one of a rising and falling edge of the waveform to reduce the magnitude of the DC component.

11. The method of claim 10, further including the step of providing a memory which stores a series of digital words wherein each digital word represents intervals between rising and falling edges of a stored PWM waveform and wherein the adder/subtractor adds or subtracts a digital magnitude word representing the magnitude of the DC component to a digital word retrieved from the memory.

12. The control of claim 10, wherein the step of detecting includes the steps of summing a signal representing the DC component with a reference to derive an error signal and amplifying the error signal.

13. The control of claim 12, wherein the adder/subtractor includes add/subtract inputs and a control input and wherein the step of detecting further includes the step of separating the amplified error signal into a magnitude signal which is coupled to the add/subtract inputs and a sign signal which is coupled to the control input.

14. A method of controlling a pulse-width modulated (PWM) inverter having a pair of switches which are alternately operated in accordance with a PWM control waveform having rising and falling edges to develop AC output power, the method comprising the steps of:

providing a memory having a plurality of series of digital words stored therein wherein each series represents intervals between rising and falling edges of a stored PWM waveform;

detecting the magnitude and polarity of a DC component in the AC output power;

providing an adder/subtractor having a first set of add/subtract inputs coupled to the memory, a second set of add/subtract inputs which receive a signal representing the magnitude of the DC component, a control input which receives a signal representing the polarity of the DC component and an output at which a series of modified interval words are developed;

providing a counter which develops a counter output; and

sequentially comparing each modified interval word against the counter output to produce the PWM control waveform;

wherein a rising or falling edge of the PWM control waveform is adjusted by the adder/subtractor relative to a corresponding rising or falling edge of the stored PWM waveform to reduce the magnitude of the DC component.

15. The control of claim 14, including the further steps of sensing a parameter of the AC output power and selecting one of the series of digital words from the memory in dependence upon the sensed parameter.