Logarithm/inverse-logarithm converter utilizing linear interpolation and method of using same
First Claim
Patent Images
1. A method for generating a log signal, which method comprises the following steps:
- receiving a digital input signal having a first bit slice representing a plurality of most significant bits and a second bit slice representing a plurality of least significant bits;
retrieving from a memory a neighboring log value and a delta value corresponding to the first bit slice;
multiplying the second bit slice by the delta value to produce a term value;
generating a correction factor that represents the term value divided by an interval value; and
summing the correction factor and the neighboring log value to produce the log signal.
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Abstract
A converter which may be used for implementing either logarithmic or inverse-logarithmic functions includes a memory, a multiplier, and an adder. The memory stores a plurality of pre-computed values which are used in an interpolation to estimate a logarithmic or inverse-logarithmic function over a domain of input signals.
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Citations
26 Claims
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1. A method for generating a log signal, which method comprises the following steps:
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receiving a digital input signal having a first bit slice representing a plurality of most significant bits and a second bit slice representing a plurality of least significant bits; retrieving from a memory a neighboring log value and a delta value corresponding to the first bit slice; multiplying the second bit slice by the delta value to produce a term value; generating a correction factor that represents the term value divided by an interval value; and summing the correction factor and the neighboring log value to produce the log signal. - View Dependent Claims (2, 3)
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4. A logarithm converter, which comprises:
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a memory for storing a plurality of neighboring log values and a plurality of delta values, the memory providing as output a neighboring log value and a delta value which correspond to a first bit slice of a digital input signal; a multiplier for multiplying a second bit slice of the digital input signal by the delta value to produce a first term; means for generating a correction factor that represents the first term divided by an interval value; and an adder for summing the correction factor and the neighboring log value to produce the log signal. - View Dependent Claims (5, 6, 7)
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8. A logarithm converter for generating a log signal in response to a digital input signal, the logarithm converter comprising:
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a memory for storing a plurality of neighboring log values and a plurality of delta values, the memory providing as output a neighboring log value and a delta value which correspond to a first bit slice of the input signal; a multiplier for multiplying a second bit slice of the input signal by the delta value to produce a correction factor representing a first term divided by an interval value; and an adder for summing the correction factor and the neighboring log value to produce the log signal. - View Dependent Claims (9, 10)
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11. A computing device, which comprises:
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a processing unit for executing a computer operation which utilizes a log signal; a computer memory for storing a computer program which includes the computer operation; a bus for connecting the processing unit and the computer memory; and a logarithm converter which receives a digital input signal and includes; a memory for storing a plurality of neighboring log values and a plurality of delta values, the memory providing as output a neighboring log value and a delta value which correspond to a first bit slice of the digital input signal; a multiplier for multiplying a second bit slice of the digital input signal by the delta value to produce a correction factor representing a first term divided by an interval value; and an adder for summing the correction factor and the neighboring log value to produce the log signal. - View Dependent Claims (12, 13)
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14. A method for generating an inverse-log signal, which method comprises the following steps:
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receiving a digital input signal having a first bit slice representing a plurality of most significant bits and a second bit slice representing a plurality of least significant bits; retrieving from a memory a neighboring inverse-log value and a delta value corresponding to the first bit slice; multiplying the second bit slice by the delta value to produce a term value; generating a correction factor that represents the term value divided by an interval value; and summing the correction factor and the neighboring log value to produce the inverse-log signal. - View Dependent Claims (15, 16)
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17. An inverse-logarithm converter, which comprises:
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a memory for storing a plurality of neighboring inverse-log values and a plurality of delta values, the memory providing as output a neighboring inverse-log value and a delta value which correspond to a first bit slice of a digital input signal; a multiplier for multiplying a second bit slice of the digital input signal by the delta value to produce a first term; means for generating a correction factor that represents the first term divided by an interval value; and an adder for summing the correction factor and the neighboring inverse-log value to produce the inverse-log signal. - View Dependent Claims (18, 19, 20)
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21. A inverse-logarithm converter for generating a inverse-log signal in response to a digital input signal, the inverse-logarithm converter comprising:
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a memory for storing a plurality of neighboring inverse-log values and a plurality of delta values, the memory providing as output a neighboring inverse-log value and a delta value which correspond to a first bit slice of the input signal; a multiplier for multiplying a second bit slice of the input signal by the delta value to produce a correction factor representing a first term divided by an interval value; and an adder for summing the correction factor and the neighboring inverse-log value to produce the inverse-log signal. - View Dependent Claims (22, 23)
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24. A computing device, which comprises:
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a processing unit for executing a computer operation which utilizes a inverse-log signal; a computer memory for storing a computer program which includes the computer operation; a bus for connecting the processing unit and the computer memory; and a inverse-logarithm converter which receives a digital input signal and includes; a memory for storing a plurality of neighboring inverse-log values and a plurality of delta values, the memory providing as output a neighboring inverse-log value and a delta value which correspond to a first bit slice of the digital input signal; a multiplier for multiplying a second bit slice of the digital input signal by the delta value to produce a correction factor representing a first term divided by an interval value; and an adder for summing the correction factor and the neighboring inverse-log value to produce the inverse-log signal. - View Dependent Claims (25, 26)
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Specification