Multiplex serial data communication circuit network with superposed clock and data signals
First Claim
1. A multiplex serial data communication circuit network comprising:
- a) a clock pulse oscillation circuit for generating a clock pulse signal;
b) a single signal transmission line on which a signal is transmitted bidirectionally in a multiplex time division mode;
c) a clock pulse signal output circuit for transmitting the clock pulse signal generated by the clock pulse oscillation circuit on said single signal transmission line;
d) a transmission data generation/output circuit for superposing a transmission data on the clock pulse signal output from said clock pulse signal output circuit;
e) a clock pulse signal extraction circuit for receiving signals present on the transmission line and for extracting the clock pules signal from the received signals; and
f) means for separating and extracting a signal required to operate therein from among the received signals and for executing a signal processing in synchronization with the extracted clock pules signal.
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Accused Products
Abstract
In multiplex serial data communication circuit network and method, a clock information is always output from a single transmission control apparatus having an oscillation source onto a single signal transmission line. Any one of the other transmission control apparatuses carries out a serial data transmission with the clock pulse signal superposed on the data to be transmitted via the single transmission line. In addition, any one of the transmission control apparatuses extracts the clock information from the clock information superposed data signals on the single transmission line and takes an operation timing within all transmission control apparatuses from the extracted clock pulse signal. Furthermore, a remote DC motor control system and method using the multiplex serial data communication circuit network described above are exemplified. Master station and slave stations in the DC motor control system can be integrated into each plurality of ICs.
64 Citations
29 Claims
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1. A multiplex serial data communication circuit network comprising:
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a) a clock pulse oscillation circuit for generating a clock pulse signal; b) a single signal transmission line on which a signal is transmitted bidirectionally in a multiplex time division mode; c) a clock pulse signal output circuit for transmitting the clock pulse signal generated by the clock pulse oscillation circuit on said single signal transmission line; d) a transmission data generation/output circuit for superposing a transmission data on the clock pulse signal output from said clock pulse signal output circuit; e) a clock pulse signal extraction circuit for receiving signals present on the transmission line and for extracting the clock pules signal from the received signals; and f) means for separating and extracting a signal required to operate therein from among the received signals and for executing a signal processing in synchronization with the extracted clock pules signal. - View Dependent Claims (17, 18, 19, 20, 21)
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2. A multiplex serial data communication circuit network comprising:
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a) a clock pulse oscillation circuit; b) a single signal transmission line; c) a clock pulse signal output circuit which is constructed and arranged as to transmit a clock pulse signal generated by the clock pulse oscillation circuit on said single signal transmission line; d) a transmission data generation/output circuit which is so constructed and arranged as to superpose a transmission data on the clock pulse signal output from said clock pulse signal output circuit; e) a clock pulse signal extraction circuit which is so constructed and arranged as to receive signals present on the transmission line and as to extract the clock pulse signal from the received signals; and f) means for separating and extracting a signal required to operate therein from among the received signals and for executing a signal processing in synchronization with the extracted clock pulse signal, wherein at least said clock pulse oscillation circuit, the clock pulse signal output circuit and transmission data generation/output circuit constitute a master station, which further comprises g) a data signal output circuit which is so constructed and arranged as to superimpose another transmission data on the clock pulse signal and output the superposed transmission data on the single transmission line, and wherein said clock pulse signal extraction circuit, said extracting and separating means, and data signal output circuit constitute a single slave station, and said slave station is constituted by a plurality of same slave stations in the multiplex serial data communication circuit network. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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22. A multiplex serial data communication method network comprising the steps of:
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a) generating a clock pulse signal in a clock pulse oscillation circuit; b) providing a single signal transmission line on which a signal is transmitted bidirectionally in a multiplex time division mode; c) transmitting the clock pulse signal generated by the clock pulse oscillation circuit on said single signal transmission line; d) superposing a transmission data on the clock pulse signal transmitted on the transmission line; e) receiving signals present on the transmission line and extracting the clock pulse signal from the received signals; and f) separating and extracting a signal required to operate therein from among the received signals and executing a signal processing in synchronization with the extracted clock pulse signal.
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23. A multiplex communication network for clock-controlled transmission of serial data between transmission control stations through a single signal transmission line connecting the transmission control stations, said network comprising:
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a) a clock pulse oscillation circuit for generating a clock pulse signal; and b) a clock pulse signal output circuit for transmitting the clock pulse signal generated by the clock pulse oscillation circuit to the signal transmission line, said network, said transmission control stations, and said signal transmission line operating for transmission between said stations in both directions; and wherein each said transmission control station includes; c) a transmitting and receiving circuit for superposing a data signal of said each station on the clock pulse signal, for transmitting the superposed data signal and clock pulse signal to said signal transmission line, said transmitted data signal having a same frequency as the clock pulse signal, and for receiving a superposed data signal and clock pulse signal from said signal transmission line; and d) means for separating a signal related to said each station from among the signals received from said transmitting and receiving circuit and for decoding the separated signal to perform signal processing in synchronization with said clock pulse signal. - View Dependent Claims (24, 25, 26, 27, 28)
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29. A multiplex serial data communication circuit network comprising:
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a) a clock pulse oscillation circuit (11) for generating a clock pulse signal; b) a single signal transmission line (20); c) a clock pulse signal output circuit for transmitting the clock pulse signal generated by the clock pulse oscillation circuit on said single signal transmission line; d) a first signal transmission control station including; i) a transmission data generating and outputting circuit for superposing and outputting a transmission data on the clock pulse signal outputted from said clock pulse signal output circuit, the transmission data having the same frequency as the clock pulse signal; ii) a clock pulse signal extraction circuit for receiving signals present on the single signal transmission line and for extracting the clock pulse signal from the received signals; and iii) means for separating and extracting a signal required to operate therein from among the received signals and for executing a signal processing in synchronization with the extracted clock pulse signal; and e) at least a second signal transmission control station including; i) a clock pulse signal extraction circuit substantially identical with said clock pulse signal extraction circuit of said first signal transmission control station; ii) a transmission data generating and outputting circuit substantially identical with said transmission data generating and outputting circuit of said first signal transmission control station; and iii) means for separating and extracting substantially identical with said means for separating and extracting of said first signal transmission control station.
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Specification