Capacitance measuring device

• US 5,602,487 A
• Filed: 08/22/1994
• Issued: 02/11/1997
• Est. Priority Date: 08/22/1994
• Status: Expired due to Fees

• Current Assignee: Zarlink Semiconductor Inc. (Microchip Technology Incorporated)
• Original Assignee: Zarlink Semiconductor Inc. (Microchip Technology Incorporated)
• Inventors: Manku, Tajinder
• Primary Examiner(s): Regan, Maura K.
• Application Number:
  US08/294,602
• Time in Patent Office: 904 Days
• Field of Search: 324/678, 324/679, 327/288, 364/481, 73/304 C
• US Class Current: 324/678
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24

Abstract

A capacitance measuring device comprises a MOS transistor having a source, drain, and gate; a first capacitor C₁ connected between said gate and said drain so that charge is coupled from said drain onto said gate; and a second capacitor C₂ for connection to a source of gate voltage V_G and connected to said gate. One of the first and second capacitors has a known capacitance and the other has an unknown capacitance. A DC voltage is supplied between the source and drain to cause a saturation current to flow therebetween. The ratio δV_G /δV_d for the saturation current, where V_G is the applied gate voltage, and V_d is the drain voltage is determined and the unknown capacitance is derived from the relationship C₁ /C₂ =-δV_G /δV_d.

Claims

1. A capacitance measuring device comprising a MOS transistor having a source, drain, and gate;

a first capacitor C₁ connected between said gate and said drain so that charge is coupled from said drain onto said gate;

a second capacitor C₂ for connection to a source of gate voltage V_G and connected to said gate;

one of said first and second capacitors having a known capacitance and the other of said first and second capacitors having an unknown capacitance;

means for applying a variable known DC voltage between said source and drain to cause a saturation current to flow therebetween; and

means for determining the ratio δ

V_G /δ

V_d for said saturation current, where V_G is the applied gate voltage, and V_d is the drain voltage;

said unknown capacitance thereby being derivable from the relationship C₁ /C₂ =-δ

V_G /δ

V_d.

2. A capacitance measuring device as claimed in claim 1, wherein said second capacitor has unknown capacitance.

3. A capacitance measuring device as claimed in claim 1, further comprising a further capacitor in series with said second capacitor, and switch means for selectively connecting one or both of said series-connected capacitors in series with said first capacitor.

4. A capacitance measuring device as claimed in claim 1, wherein said MOS device is an n-channel MOSFET.

5. A capacitance measuring device as claimed in claim 1, wherein said MOS device is an p-channel MOSFET.

10. A method as claimed in claim 1 wherein said determining means includes a voltage meter measuring said drain voltage.

6. A method of measuring capacitance, comprising isolating a gate region of a MOS device from exterior biasing with a first capacitor, coupling charge between a drain and said gate of said MOS device with a second capacitor, one of said first and second capacitors having an unknown capacitance, and measuring the rate of change of gate voltage with respect to drain voltage at saturation current to derive said unknown capacitance therefrom.

7. A method as claimed in claim 6, comprising connecting a third capacitor in series with said first capacitor, and selectively switching said capacitors so that alternately the series combination of said first and third capacitors, and said third capacitor only are connected to said drain.

8. A method as claimed in claim 6, wherein said MOS device is an n-channel MOSFET.

9. A method as claimed in claim 6, wherein said MOS device is an p-channel MOSFET.