Zerox-IF receiver with tracking second local oscillator and demodulator phase locked loop oscillator

• US 5,606,731 A
• Filed: 03/07/1995
• Issued: 02/25/1997
• Est. Priority Date: 03/07/1995
• Status: Expired due to Term

• Current Assignee: Apple Inc.
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Pace, Gary L., Peterson, Vance H., Callaway, Jr., Edgar H.
• Primary Examiner(s): Faile, Andrew
• Assistant Examiner(s): Nguyen, Lee
• Application Number:
  US08/399,805
• Time in Patent Office: 721 Days
• Field of Search: 455/207, 455/208, 455/209, 455/255, 455/257, 455/258, 455/259, 455/260, 455/264, 455/265, 455/314, 455/315, 455/316, 455/75, 455/164.1, 455/164.2, 455/182.2 , 455/192.2, 455/196.1, 455/197.2, 455/324, 375/327, 375/344, 375/376, 329/325, 329/326
• US Class Current: 455/260
• CPC Class Codes: H03D 3/242 combined with means for controlling the frequency of a further oscillator, e.g. for negative frequency feedback or AFC
• CPC Class Codes: H03J 7/04 where the frequency control is accomplished by varying the electrical characteristics of a non-mechanically adjustable element or where the nature of the frequency controlling element is not significant
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

A zero-intermediate frequency receiver circuit (11) for receiving a radio frequency signal detected by an antenna (14). The receiver circuit (10) comprises a second local oscillator circuit (25) and an oscillator circuit (60) of a phase locked loop demodulator (36) which are identical and track each other so as to provide a more accurate reference for processing a demodulated signal. A current reference (39) providing a current reference signal utilized by the second local oscillator circuit (25) and the oscillator circuit (60) of the phase locked loop demodulator (36).

Claims

1. A zero-intermediate frequency receiver circuit for receiving a radio frequency signal detected by an antenna, the receiver circuit comprising:

an amplifier for amplifying the radio frequency signal detected by the antenna and generating an amplified signal;

a first local oscillator circuit for generating a first local oscillator signal;

a first mixer coupled to the first local oscillator circuit and to the amplifier for mixing the amplified signal with the first local oscillator signal and generating a first mixed signal;

a base band filter coupled to the first mixer for filtering the first mixed signal and generating a filtered signal;

a voltage reference for providing a voltage reference signal;

a current reference for providing first and second current reference signals which are substantially equal;

a second local oscillator circuit coupled to the voltage reference and coupled to the current reference for receiving the first current reference signal, for generating a second local oscillator signal;

a second mixer coupled to the second local oscillator circuit and to the base band filter for mixing the filtered signal and generating at an output a second mixed signal;

a phase locked loop demodulator having an oscillator circuit coupled to the current reference for receiving the second current reference signal and coupled to the output of the second mixer for generating a phase locked loop oscillator signal, the phase locked loop demodulator for demodulating the second mixed signal to generate at an output a demodulated signal;

wherein a functional relationship between inputs and output of the second local oscillator circuit is substantially equal to a functional relationship between inputs and output of the oscillator circuit of the phase locked loop demodulator; and

a signal processor having at least a threshold input and a signal input, and an output, the threshold input of the signal processor coupled to the voltage reference, the signal input of the signal processor being coupled to the output of the phase locked loop demodulator, the signal processor generating at the output an output signal based on signals at the threshold input and signal input.

2. The receiver circuit of claim 1, wherein the second local oscillator circuit comprises:

a first current controlled oscillator having an input and an output;

a first transconductance amplifier having at least one input, a bias, and an output, the bias of the first transconductance amplifier coupled to the current reference, the at least one input of the first transconductance amplifier coupled to the voltage reference, and the output of the first transconductance amplifier coupled to the input of the first current controlled oscillator;

wherein the oscillator circuit of the phase locked loop demodulator comprises;

a second current controlled oscillator having an input and an output, the phase locked loop oscillator signal being generated at the output of the second current controlled oscillator; and

a second transconductance amplifier having at least one input, a bias and an output, the bias of the second transconductance amplifier coupled to the current reference, the at least one input coupled to the output of the second current controlled oscillator, the output of the second transconductance amplifier coupled to the input of the second current controlled oscillator.

3. The receiver circuit of claim 2, wherein the phase locked loop demodulator comprises an exclusive-OR gate having first and second inputs and an output, and a voltage-to-current converter having an input coupled to the output of the exclusive-OR gate and at least one output coupled to the at least one input of the second transconductance amplifier, the first input of the exclusive-OR gate coupled to the output of the second current controlled oscillator and the second input of the exclusive-OR gate coupled to the output of the second mixer.

4. The receiver circuit of claim 3, wherein the voltage-to-current converter comprises first and second outputs, the first output coupled to the input of the second current controlled oscillator, and the second output coupled to the at least one input of the second transconductance amplifier, wherein a signal at the second output is proportional to a signal at the first output by a constant factor, and further comprising a capacitor connected between the second output of the voltage-to-current converter and ground.

5. The receiver circuit of claim 4, and further comprising first and second buffer amplifiers each having an input and an output, the input of the first buffer amplifier coupled to the first output of the voltage-to-current converter, the input of the second buffer amplifier coupled to the second output of the voltage-to-current converter, and the output of the second buffer amplifier coupled to the at least one input of the second transconductance amplifier.

6. The receiver circuit of claim 5, wherein the first and second buffer amplifiers are matched such that a ratio of currents in their respective inputs is equal to a ratio of currents in the first and second outputs of the voltage-to-current converter.

7. The receiver circuit of claim 4, and further comprising first and second current amplifiers each having an input, an output, and a bias, the bias of the first current amplifier coupled to the voltage reference and the output coupled to the input of the first current controlled oscillator, the input of the second current amplifier coupled to the first output of the voltage-to-current converter, the output of the second current amplifier coupled to the input of the second current controlled oscillator and the bias of the second current amplifier coupled to the voltage reference.

8. The receiver circuit of claim 3, wherein the phase locked loop demodulator further comprises a loop filter comprising a resistor and capacitor connected in series and coupled to the output of the voltage-to-current converter, and wherein a voltage across the capacitor corresponds to a recovered audio voltage signal.

9. The receiver circuit of claim 1, wherein the second local oscillator circuit comprises:

a first current controlled oscillator having an input and an output;

a first current amplifier having an input, an output and a bias, the output of the first current amplifier coupled to the input of the first current controlled oscillator, the bias of the first current amplifier being coupled to the voltage reference;

wherein the phase locked loop demodulator comprises;

a second current controlled oscillator having an input and an output, the phase locked loop oscillator signal being generated at the output of the second current controlled oscillator;

a second current amplifier having an input, an output and a bias, the output of the second current amplifier coupled to the input of the second current controlled oscillator, the bias of the second current amplifier being coupled to the voltage reference;

an exclusive-OR gate having first and second inputs and an output, the first input coupled to the output of the second current controlled oscillator, the second input coupled to the second mixer;

a voltage-to-current converter having an input and first and second outputs, the input coupled to the output of the exclusive-OR gate, the first output coupled to the input of the second current controlled oscillator, a signal at the first output being proportional to a signal at the second output by a constant factor;

a capacitor connected between the second output of the voltage-to-current converter and ground; and

a resistor coupled between the capacitor and the input of the second current amplifier.

10. The receiver circuit of claim 9, wherein the second local oscillator circuit comprises a third current amplifier having an input, output and bias, the bias coupled to the voltage reference, the output coupled to the input of the first current controlled oscillator;

and

wherein the oscillator circuit of the phase locked loop demodulator comprises a fourth current amplifier having an input, an output and a bias, the bias coupled to the voltage reference, the input connected to the first output of the voltage-to-current converter and the output connected to the input of the second current controlled oscillator.

11. The receiver circuit of claim 9, wherein the threshold input of the signal processor is coupled to the input of the first current amplifier.

12. The receiver circuit of claim 9, wherein the threshold input of the signal processor is coupled to the input of the second current amplifier.

13. The receiver circuit of claim 9, wherein the signal processor is a data limiter, wherein the output signal of the signal processor is a data signal generated by comparing the demodulated signal with a signal at the threshold input thereof.

14. The receiver circuit of claim 9, wherein the signal processor comprises an automatic frequency control (AFC) signal processor having a first input coupled to the voltage reference and a second input coupled to the output of the phase locked loop demodulator for generating as output an AFC error signal which is coupled to the first local oscillator circuit.

15. The receiver circuit of claim 14, and further comprising:

a tunable capacitor coupled to the first local oscillator circuit and to the AFC signal processor for changing a frequency of the first local oscillator signal in response to the AFC error signal.

16. The receiver circuit of claim 1, wherein the signal processor is a data limiter, wherein the output signal of the signal processor is a data signal generated by comparing the demodulated signal with a signal at the threshold input of the signal processor.

17. The receiver circuit of claim 1, wherein the signal processor comprises an automatic frequency control (AFC) signal processor having a first input coupled to the voltage reference and a second input coupled to the output of the phase locked loop demodulator for generating as output an AFC error signal which is coupled to the first local oscillator circuit.

18. The receiver circuit of claim 17, and further comprising:

a tunable capacitor coupled to the first local oscillator circuit and to the AFC signal processor for changing a frequency of the first local oscillator signal in response to the AFC error signal.

19. A selective call receiver comprising the receiver circuit of claim 1, and further comprising:

a decoder coupled to the output of the signal processor of the receiver circuit for decoding information in the output signal of the signal processor;

a memory coupled to the decoder for storing an address unique to a particular selective call receiver; and

a display coupled to the decoder for displaying a message in the information received by the receiver circuit.

20. A zero-intermediate frequency receiver circuit for receiving a radio frequency signal detected by an antenna, the receiver circuit comprising:

an amplifier for amplifying the radio frequency signal detected by the antenna and generating an amplified signal;

a first local oscillator circuit for generating a first local oscillator signal;

a first mixer coupled to the first local oscillator circuit and to the amplifier for mixing the amplified signal with the first local oscillator signal and generating a first mixed signal;

a base band filter coupled to the first mixer for filtering the first mixed signal and generating a filtered signal;

a voltage reference for providing a voltage reference signal;

a current reference for providing first and second current reference signals which are substantially equal;

a second local oscillator circuit coupled to the voltage reference and coupled to the current reference for receiving as input the first current reference signal, for generating as output a second local oscillator signal in accordance with an input to output functional relationship;

a second mixer coupled to the second local oscillator circuit and to the base band filter for mixing the filtered signal and generating at an output a second mixed signal;

a phase locked loop demodulator having an oscillator circuit coupled to the current reference for receiving the second current reference signal and coupled to the output of the second mixer for generating a phase locked loop oscillator signal in accordance with an input to output functional relationship, the phase locked loop demodulator for demodulating the second mixed signal to generate at an output a demodulated signal;

wherein the input to output functional relationship of the second local oscillator circuit is substantially the same as the input to output functional relationship of the oscillator circuit of the phase locked loop demodulator; and

a signal processor having at least a threshold input and a signal input, and an output, the threshold input of the signal processor coupled to the voltage reference, the signal input of the signal processor being coupled to the output of the phase locked loop demodulator, the signal processor generating at the output an output signal based on signals at the threshold input and signal input.