System and method for RAM power and data backup utilizing a capacitor and ROM

• US 5,608,684 A
• Filed: 10/13/1994
• Issued: 03/04/1997
• Est. Priority Date: 10/13/1994
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Williams, Eric E., Reasoner, Kelly J.
• Primary Examiner(s): Yoo, Do Hyun
• Application Number:
  US08/322,808
• Time in Patent Office: 873 Days
• Field of Search: 365/226, 365/102, 365/149, 365/222, 365/228, 365/154
• US Class Current: 365/228
• CPC Class Codes: G11C 11/005 comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
• CPC Class Codes: G11C 5/141 Battery and back-up supplies

Abstract

A system and method for permanently backing up RAM memory devices. The present invention utilizes a capacitor as a primary backup device for supplying the necessary backup power for power fluctuations, power interruptions, and other short-duration power failures. The present invention also utilizes a ROM as a secondary backup device for backing up and restoring valid RAM data when the duration of power loss is greater than that for which the capacitor can supply backup power. Thus, the integrity of RAM data is guaranteed for all types of power fluctuations, interruptions, and failures. The ROM includes two storage areas for separately storing two copies of RAM data. The processor first determines whether the data stored in the RAM is valid. If the present RAM data is valid, the processor backs up the present RAM data by replacing the oldest or invalid copy in the ROM with the present RAM data. If the present RAM data is not valid, the processor restores the RAM data with the most recent valid data previously stored in the ROM.

Claims

1. A random access memory (RAM) backup system, comprising:

a RAM, configured to store binary data, including a supply voltage input adapted to receive a supply voltage thereon;

a capacitor, electrically coupled to said voltage input of said RAM, configured to provide said RAM with a voltage for a period of time, said voltage sufficient for said RAM to maintain said storage of said data;

a read only memory (ROM) having separate locations for concurrently storing multiple copies of said data stored in said RAM; and

processing means, coupled to said RAM and said ROM, for transferring said copies of said data between said RAM and said ROM.

2. The system of claim 1, wherein said ROM stores a first copy and a second copy of said data stored in said RAM, and further wherein said ROM enables said first copy of said data to be stored and erased separately from said second copy of said data.

3. The system of claim 2, further comprising:

a power supply circuit, interposed between said RAM and a line power source having a line voltage, configured to convert and maintain said line voltage to said supply voltage.

4. The system of claim 3, wherein said processing means comprises:

a backup processing means for copying said first copy and said second copy of said data in said RAM to said ROM; and

a restore processing means for copying said first copy and said second copy of said data stored in said ROM to said RAM.