Semiconductor device

• US 5,610,414 A
• Filed: 07/15/1994
• Issued: 03/11/1997
• Est. Priority Date: 07/28/1993
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Yamane, Yasukuni, Ishii, Yutaka, Yoshida, Shigeto, Katoh, Kenichi, Yoneda, Hiroshi
• Primary Examiner(s): Crane, Sara W.
• Assistant Examiner(s): Abraham, Fetsum
• Application Number:
  US08/275,676
• Time in Patent Office: 970 Days
• Field of Search: 257/99, 257/57, 257/59, 257/60, 257/72, 257/203, 359/54, 359/57, 359/58, 359/73, 359/198
• US Class Current: 257/99
• CPC Class Codes: G02F 1/13452 Conductors connecting driver circuitry and terminals of panels
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

In a semiconductor device wherein an active device circuit and electrically conductive lines, such as a power source line for supplying power to the semiconductor active device circuit or signal lines for inputting a signal to the semiconductor active device circuit, are formed together on a single substrate, an improved arrangement wherein a conventional power source or signal line is formed by using a plurally of individual lines of substantially uniform electrical resistance where the electrical resistance of each line is limited to a predetermined value. Moreover, a waveform deterioration response signal component is added to a signal transmitted through the signal lines so as to improve the transmitted signal by compensating for waveform deterioration experienced during circuit operation. In addition, an electrical capacity forming electrode is provided alongside substantial length of the power source line. A capacitor is thus effectively formed within the active device circuit by intervening a dielectric between the power source line and the capacity forming electrode so as to reduce high-frequency noise which occurs in the power source line. The disclosed arrangements substantially reduce the occurrence of an irregular operation in the active device circuit.

Claims

1. A semiconductor device, comprising:

a substrate having formed thereon a matrix portion having a plurality of active device elements formed thereon in a matrix form;

an active device circuit including a semiconductor active device, said active device circuit having a plurality of input terminals, said active device circuit being formed around the matrix portion on said substrate;

an external connection terminal comprising one or more divided pieces arranged substantially parallel to said active device circuit for making an electrical connection with an external circuit aside from said semiconductor device, said external connection terminal being formed on an edge of said substrate; and

an electrically conductive line for making an electrical connection between each input terminal of said active device circuit and said external connection terminal, said electrically conductive line being formed on said substrate, wherein said electrically conductive line is divided into portions comprising a plurality of divided lines whose wiring resistance each has a predetermined value or less.

2. The semiconductor device as defined in claim 1, wherein said active device circuit is formed monolithically on said substrate.

3. The semiconductor device as defined in claim 1, wherein said active device circuit is a semiconductor chip mounted on said substrate.

4. The semiconductor device as defined in claim 1, wherein said electrically conductive line is a signal line for inputting a signal from the external circuit into said active device circuit.

5. The semiconductor device as defined in claim 1, wherein said electrically conductive line is a power source line for supplying a source power from the external circuit to said active device circuit.

6. The semiconductor device as defined in claim 1, wherein said external connection terminal is formed along the edge of the substrate, and a terminal width in a direction parallel to the edge of the substrate is larger than a terminal width in a direction at right angles to the edge of the substrate.

7. The semiconductor device as defined in claim 6, wherein:

a plurality of said external connection terminals exist on the substrate, and

said plurality of connection terminals are arranged in a row in a direction from the edge of the substrate towards the inside of the substrate.

8. The semiconductor device as defined in claim 1 which is an image display device, wherein:

an image display section is formed on said substrate, and

said active device circuit includes a driver circuit for driving said image display section.

9. The semiconductor device as defined claim 8, wherein each divided line is formed so that a variation in wiring resistance between said external connection terminal and each input section of said active device circuit is within the range of ±

3.1% with respect to an average value of the wiring resistance.

10. The semiconductor device as defined in claim 9, wherein:

said each divided line is constituted of a main line having an almost constant width and a plurality of branch lines which are branched from said main line so as to be connected to each input section of said active device circuit, and

As a wiring distance from said external connection terminal becomes longer, the width of said branch lines becomes larger so that the variation in the wiring resistance between said external connection terminal and the input section of said active device circuit is within the above range.

11. The semiconductor device as defined in claim 9, wherein:

said divided lines are constituted of a main line and a plurality of branch lines which are branched from said main line so as to be connected to each input section of said active device circuit, and

As the main line is away farther from said external connection terminal, its width becomes larger so that the variation in the wiring resistance between said external connection terminal and each input section of said active device circuit is within the above range.

12. The semiconductor device as defined in claim 9, wherein each divided line is formed so that a variation in a length of each divided line falls in the range of ±

3.1% with respect to an average value from lengths of all the divided lines.

13. The semiconductor device as defined in claim 8, wherein:

said electrically conductive line is a video signal line for transmitting a video signal from the external circuit to said driver circuit,

said driver circuit includes a sampling circuit, which has a plurality of sampling switches, for sampling the video signal inputted from said video signal line, and

said sampling switches are divided into a plurality of groups, and each group and said external connection terminal are connected by each divided line of said video signal line.

14. The semiconductor device as defined in claim 8, wherein:

said electrically conductive line is a start line for transmitting a start signal from the external circuit to said driver circuit, and

said driver circuit includes a sampling signal generating circuit for generating a sampling signal which determines a sampling period of the video signal based upon the start signal inputted from said start line.

15. The semiconductor device as defined in claim 8, wherein said image display device is a liquid crystal display unit.

16. The semiconductor device as defined in claim 8, wherein:

said image display section includes an active device for driving a picture element, and

carrier mobility μ

of said active device obtains the following relation;

space="preserve" listing-type="equation">μ

≧

5 cm.sup.2 /V·

sec.

17. The semiconductor device as defined in claim 16, wherein said active device is a polycrystal silicon thin film transistor.

18. The semiconductor device as defined in claim 8, wherein:

said electrically conductive line is a clock signal line for transmitting a clock signal from an outer circuit to said driver circuit;

said driver circuit includes a sampling signal generating circuit for generating a sampling signal which determines a sampling cycle of an image signal based upon the clock signal inputted from the clock signal line.

19. A semiconductor device, comprising:

a substrate;

an active device circuit including a semiconductor active device, said active device circuit being formed on said substrate;

a signal line for transmitting a basic signal, which takes at least 2 values inputted from an outside of said semiconductor device thereinto, to said active device circuit, said signal line being formed on said substrate; and

a waveform improvement signal generating circuit for generating a waveform improvement signal which is obtained by applying a waveform deterioration corresponding signal component to a basic signal transmitted through said signal line so as to supply said waveform improvement signal to said active device circuit,

wherein said waveform improvement signal generating circuit obtains the following relations;

space="preserve" listing-type="equation">|v|<

|V|;

(1)

and

space="preserve" listing-type="equation">f≦

F, (2)

where v is a maximum amplitude of a basic signal component in said waveform improvement signal and V is a maximum amplitude of a part of said waveform improvement signal including the waveform deterioration response signal component, f is a frequency of said basic signal component and F is a frequency of the waveform deterioration response signal component.

20. The semiconductor device as defined in claim 19, wherein said active device circuit is formed monolithically on said substrate.

21. The semiconductor device as defined in claim 19, wherein said active device circuit is a semiconductor chip mounted on said substrate.

22. The semiconductor device as defined in claim 19, wherein said waveform improvement signal generating circuit is a differentiating circuit for differentiating the basic signal inputted from the outside so as to create the waveform improvement signal.

23. The semiconductor device as defined in claim 19, wherein said waveform improvement signal generating circuit includes:

waveform deterioration response signal generating means for generating the waveform deterioration response signal; and

adding means for adding the waveform deterioration response signal generated by said waveform deterioration response signal generating means to the basic signal inputted from the outside.

24. The semiconductor device as defined in claim 23, wherein said waveform deterioration response signal generating means is a differentiating circuit for differentiating the basic signal inputted from the outside so as to generate the waveform deterioration response signal.

25. The semiconductor device as defined in claim 19, which is an image display unit, wherein on said substrate an image display section is formed.

26. The semiconductor device as defined in claim 25, wherein said active device circuit includes a driver circuit for driving said image display section.

27. The semiconductor device as defined in claim 25, wherein said image display unit is a liquid crystal display unit.

28. The semiconductor device as defined in claim 25, wherein:

said image display section includes an active device for driving a picture element, and

carrier mobility of said active device μ

obtains the following relation;

space="preserve" listing-type="equation">μ

≧

5 cm.sup.2 /V·

sec.

29. The semiconductor device as defined in claim 28, wherein said active device is a polycrystal silicon thin film transistor.

30. A semiconductor device, comprising:

a substrate;

an active device circuit including a semiconductor active device, said active device circuit being formed on said substrate; and

a signal line for transmitting an input signal inputted from the outside of said semiconductor device to said active device circuit, said signal line being formed on said substrate;

wherein said active device circuit includes a phase characteristic improvement circuit comprising a differentiation circuit for compensating for waveform deterioration.

31. The semiconductor device as defined in claim 30 which is an image display unit, wherein on said substrate an image display section is formed.

32. The semiconductor device as defined in claim 31, wherein said image display section and said active device circuit are formed monolithically on said substrate.

33. The semiconductor device as defined in claim 31, wherein said active device circuit is constituted of a semiconductor chip and is mounted on said substrate where said image display section has been formed.

34. A semiconductor device, comprising:

a substrate;

an active device circuit including a semiconductor active device, said active device circuit being formed on said substrate;

a signal line for transmitting a basic signal, which determines operational frequency of said active device circuit, to said active device circuit, said basic signal being inputted from an outside of said semiconductor device, said signal line being formed on said substrate; and

a waveform improvement circuit for adding a waveform deterioration response signal component to a rising portion or a falling portion that is a portion where an operation timing is specified in said basic signal,

wherein said waveform improvement circuit obtains the following relation;

where f is an operation frequency of the active device circuit which is operated by said basic signal, and T is a minimum pulse width of said waveform deterioration response signal component.

35. The semiconductor device as defined in claim 34, wherein said waveform improvement circuit includes:

waveform deterioration response signal generating means for generating the waveform deterioration response signal;

adding means for adding the waveform deterioration response signal generated by said waveform deterioration response signal generating means to the basic signal inputted from the outside.

36. The semiconductor device as defined in claim 35, wherein said waveform deterioration response signal generating means is a differentiating circuit for differentiating the basic signal inputted from the outside so as to create the waveform deterioration response signal.

37. The semiconductor device as defined in claim 35, wherein said waveform deterioration response signal generating means is a sine wave generating circuit for generating the waveform deterioration response signal having a sine wave.

38. The semiconductor device as defined in claim 34, wherein said waveform improvement circuit obtains the following relation:

space="preserve" listing-type="equation">|V.sub.T |>

|V.sub.f |

where V_T is a peak value of said waveform deterioration response signal component and V_f is a peak value of said basic signal component.

39. The semiconductor device as defined in claim 34 which is an image display device, wherein on said substrate an image display section is formed.

40. The semiconductor device as defined in claim 39, wherein said image display section and said active device circuit are formed monolithically on said substrate.

41. The semiconductor device as defined in claim 39, wherein said active device circuit is constituted of a semiconductor chip and is mounted on said substrate where said image display section has been formed.

42. A semiconductor device, comprising:

an insulating substrate;

an active device circuit including a semiconductor active device, said active device circuit being formed on said substrate; and

a signal line for transmitting an input signal inputted from an outside of said semiconductor device to said active device circuit, said signal line being formed on said substrate,

wherein said active device circuit obtains the following relation;

space="preserve" listing-type="equation">V.sub.pp >

|V.sub.DD -V.sub.EE |

where V_DD is a maximum source voltage of said active device circuit, V_EE is a minimum source voltage and V_pp (peak-to-peak value) is an amplitude of the input signal to be inputted to said active device circuit.

43. The semiconductor device as defined in claim 42 which is an image display device, wherein on said substrate an image display section is formed.

44. The semiconductor device as defined in claim 43, wherein said image display section and said active device circuit are formed monolithically on said substrate.

45. The semiconductor device as defined in claim 43, wherein said active device circuit is constituted of a semiconductor chip and is mounted on said substrate provided with said image display section formed thereon.

46. A semiconductor device, comprising:

a substrate;

an active device circuit including a semiconductor active device, said active device circuit being formed on said substrate;

a power source line for supplying a source voltage from the outside of said semiconductor device to said active device circuit, said power source line being formed on said substrate;

a capacity forming electrode having a reference potential, said capacity forming electrode being arranged so that at least one portion of said electrode is opposite to said power source line; and

a capacity forming dielectric being arranged between said power source line and said capacity forming electrode which are arranged opposite to each other.

47. The semiconductor device as defined in claim 46, wherein said active device circuit is formed monolithically on said substrate.

48. The semiconductor device as defined in claim 46, wherein said active device circuit is a semiconductor chip mounted on said substrate.

49. The semiconductor device as defined in claim 48, wherein said semiconductor chip includes:

a chip substrate;

said semiconductor active device formed on said chip substrate;

a power supply line for supplying a power to said semiconductor active device, said power supply line being formed on said chip substrate;

a second capacity forming electrode having a reference potential, said second capacity forming electrode being arranged so that at least one portion of said second electrode is opposite to said power supply line; and

a second capacity forming dielectric arranged between the power supply line and the second capacity forming electrode which are arranged opposite to each other.

50. The semiconductor device as defined in claim 46, wherein said substrate is an insulating substrate.

51. The semiconductor device as defined in claim 50, wherein said insulating substrate is a glass substrate.

52. The semiconductor device as defined in claim 46, wherein said substrate is a semiconductor substrate on which an insulating film is formed.

53. The semiconductor device as defined in claim 46 which is an image display device, wherein on said substrate an image display section is formed.

54. The semiconductor device as defined in claim 53, wherein said active device circuit includes a driver circuit for driving said image display section.

55. The semiconductor device as defined in claim 53, wherein said image display device is a liquid crystal display unit.

56. The semiconductor device as defined in claim 53, wherein said image display device is a plasma display device.

57. The semiconductor device as defined in claim 53, wherein said image display device is a light emitting diode display device.

58. The semiconductor device as defined in claim 53, wherein:

said image display section includes an active device for driving a picture element, and

carrier mobility μ

of said active device is 5 cm² /V·

sec or more (μ

≧

5 cm² /V·

sec).

59. The semiconductor device as defined in claim 58, wherein said active device is a polycrystal silicon thin film transistor.

60. The semiconductor device as defined in claim 46 is an information input device.

61. The semiconductor device as defined in claim 46 is an information output device.

62. The semiconductor device as defined in claim 46 is an information accumulating device.

63. The semiconductor device as defined in claim 46, wherein said power source line includes a nonmetallic electrically conductive film and a metal film electrically connected to said nonmetallic electrically conductive film.

64. The semiconductor device as defined in claim 46, wherein said capacity forming electrode includes a nonmetallic electrically conductive film and a metal film connected to said electrically nonmetallic conductive film.

65. A semiconductor device, comprising:

a first substrate;

a second substrate arranged opposite to said first substrate;

an active device circuit including a semiconductor active device, said active device circuit being formed on said first substrate;

a power source line for supplying a source voltage from an outside of said semiconductor device to said active device circuit, said power source line being formed on said first substrate;

a capacity forming electrode having a reference potential arranged so that at least one portion of said electrode is opposite to said power supply line, said capacity forming electrode being formed on said second substrate; and

a capacity forming dielectric being arranged between the power supply line and the capacity forming electrode which are arranged opposite to each other.

66. The semiconductor device as defined in claim 65 which is an image display device, wherein on said first substrate an image display section is formed.

67. The semiconductor device as defined in claim 66, wherein said image display device is a liquid crystal display unit.

68. The semiconductor device as defined in claim 67, wherein said capacity forming dielectric is liquid crystal.

69. The semiconductor device as defined in claim 68, further comprising a partition member for separating liquid crystal to be used for display and liquid crystal to be used as said capacity forming dielectric.

70. The semiconductor device as defined claim 66, wherein:

said image display section on said first substrate includes an image display electrode,

said second substrate is an opposite substrate where a counter electrode arranged opposite to said image display electrode is formed on the surface.

71. The semiconductor device as defined in claim 70, wherein said capacity forming electrode is said counter electrode which is formed so as to be extended to a position facing said power source line.

72. The semiconductor device as defined in claim 65, further comprising:

a sealing member for sealing a space between said first and second substrates, said sealing member being provided between said substrates,

wherein said capacity forming dielectric is constituted of said sealing member.

73. A semiconductor device, comprising:

a monolithic substrate having an external connection terminal comprising one or more portions arranged parallel to an edge of said substrate for making an electrical connection external to said semiconductor device;

an active device semiconductor circuit formed on said substrate, said active device circuit having a plurality of circuit input points associated therewith;

an electrical conductor formed on said substrate for making an electrical connection between said external connection terminal and a plurality of said circuit input points, wherein said electrical conductor comprises a plurality of conductive line portions each of which has an electrical resistance of a predetermined value, such that different conductive paths from said external connection terminal to each input point in said active device circuit have substantially uniform resistances.

74. In a semiconductor device having an active device circuit formed on a monolithic substrate, an external connection terminal for making an electrical connection with an another circuit aside from said active device circuit, said external connection terminal being formed on an edge of said substrate, and a signal line formed on said substrate for conducting an input signal from the external connection terminal to various points in said active device circuit, a method for compensating for a characteristic phase shift in the input signal due to waveform deterioration along the length of said signal line, comprising the steps of:

generating a waveform deterioration response signal component, said waveform deterioration response signal component produced by a phase characteristic improvement circuit also formed on said substrate; and

combining the waveform deterioration response signal component with the input signal on said signal line so as to coincide with rising or falling edge components of said input signal.

75. In a semiconductor device having an active device circuit formed on a monolithic substrate, and a signal line formed on said substrate for conducting an input signal from an external connection terminal to various input points in said active device circuit, a method for improving characteristics of the input signal, comprising the steps of:

forming said external connection terminal as one or more portions arranged parallel to an edge of said substrate for making an electrical connection external to said substrate; and

forming said signal line as a plurality of connected portions consisting of electrically conductive lines of varying widths, each of which has an electrical resistance of a predetermined value such that different conductive paths from said external connection terminal to each input point in said active device circuit have substantially uniform resistance.