Edge termination structure for power MOSFET

• US 5,614,751 A
• Filed: 04/15/1996
• Issued: 03/25/1997
• Est. Priority Date: 01/10/1995
• Status: Expired due to Term

• Current Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Original Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Inventors: Hshieh, Fwu-Iuan, Yilmaz, Hamza
• Primary Examiner(s): FAHMY, WAEL M
• Application Number:
  US08/632,052
• Time in Patent Office: 344 Days
• Field of Search: 257/329, 257/330, 257/331, 257/334, 257/341, 257/372, 257/376, 257/345, 257/394, 257/395, 257/396, 257/397, 257/398, 257/399, 257/400, 257/487, 257/488
• US Class Current: 257/394
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A termination structure (located along a transistor perimeter or a die edge) for a trenched MOSFET or other semiconductor device prevents the undesirable surface channelling phenomena without the need for any additional masking steps to form a channel stop. This structure is especially applicable to P-channel MOSFETs. In the prior art a mask defines a doped channel stop. Instead here, a blanket ion implantation of P-type ions is performed after the active area masking process. Thus this doped channel stop termination is in effect masked during fabrication by the field oxide. In another version the channel stop termination is an additional trench formed in the termination region of the MOSFET. The trench is conventionally lined with oxide and filled with a conductive polysilicon field plate which extends to the edge of the die. In another version, the doped and trenched channel stops are used in combination. The channel stops are enhanced by provision of field plates overlying them on the die surface.

Claims

1. A semiconductor transistor device formed in a substrate of a first conductivity type and having a principal surface and comprising:

at least one active transistor body region formed in the substrate and doped a second conductivity type;

at least one trench formed in the substrate in the active transistor body region, a gate electrode being formed in the trench; and

a channel stop termination structure located in the substrate at a perimeter of the transistor and a portion of the substrate of the first conductivity type being immediately laterally adjacent the channel stop termination structure, the channel stop termination structure including;

a channel stop trench formed in the substrate; and

a conductive channel stop material filling the trench and extending over the principal surface adjacent the channel stop trench.

2. The device of claim 1, wherein the channel stop trench is lined with an insulating layer that extends over the principal surface of the substrate adjacent the channel stop trench.

3. The device of claim 1, wherein the conductive channel stop material is doped polycrystalline silicon.

4. The device of claim 1, wherein a portion of the conductive channel stop material extending over the principal surface is a field plate and extends to an edge of the substrate.

5. The device of claim 2, further comprising:

a field oxide insulating layer thicker than the insulating layer lining the channel stop trench and overlying a portion of the principal surface between the at least one trench and the channel stop trench.

6. The device of claim 1, further comprising a doped channel stop region formed in the substrate and being of the same doping type as the substrate and more heavily doped than a laterally adjacent portion of the substrate and extending from the channel stop trench towards an edge of the substrate.

7. The device of claim 1, wherein the channel stop trench extends along and adjacent to all four edges of the substrate.

8. The device of claim 1, wherein the channel stop trench extends to an edge of the substrate.

9. The device of claim 1, wherein the channel stop trench laterally surrounds an active portion of the transistor.

10. The device of claim 1, the termination structure further comprising:

a second channel stop trench formed in the substrate; and

a second conductive channel stop material filling the second trench.

11. A semiconductor device formed on a substrate having a principal surface and an edge, the device having an active portion and a termination portion at a perimeter of the active portion, the active portion comprising:

at least one doped region formed in the substrate; and

at least one trench formed in the substrate in the doped region, a conductive electrode being formed in the trench;

the termination portion including a channel stop structure being a doped region formed in the substrate having the same doping type and a different doping level as the substrate;

wherein the at least one trench is lined with a gate insulating layer, and further comprising a field oxide insulating layer overlying a portion of the principal surface between the at least one trench and the channel stop structure, the field oxide layer being thicker than the gate insulating layer, and the channel stop structure extending from an outer lateral edge of the field oxide layer to the edge of the substrate.

12. The device of claim 11, wherein the channel stop structure doped region is more heavily doped than a laterally adjacent portion of the substrate.

13. The device of claim 11, the termination portion further including a conductive field plate located overlying the principal surface of the substrate and overlying the channel stop structure doped region.

14. The device of claim 13, wherein the field plate is doped polycrystalline silicon.

15. The device of claim 11, further comprising a portion of the gate insulating layer overlying the channel stop structure.

16. A semiconductor transistor device formed in a substrate having a principal surface and an edge and comprising:

at least one active transistor doped region formed in the substrate;

at least one trench formed in the substrate in the active transistor doped region, a gate electrode being formed in the trench; and

a channel stop termination structure located in the substrate at a perimeter of the transistor, the channel stop termination structure including;

a channel stop trench formed in the substrate;

a conductive channel stop material filling the trench and extending over the principal surface adjacent the channel stop trench; and

a doped channel stop region formed in the substrate and being of the same doping type as the substrate and more heavily doped than a laterally adjacent portion of the substrate and extending from the channel stop trench towards the edge of the substrate.