Power supply with power factor correction

• US 5,614,812 A
• Filed: 06/11/1996
• Issued: 03/25/1997
• Est. Priority Date: 03/16/1995
• Status: Expired due to Fees

• Current Assignee: Franklin Electric Company Incorporated (EBW, Inc.)
• Original Assignee: Franklin Electric Company Incorporated (EBW, Inc.)
• Inventors: Wagoner, Robert G.
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): BERHANE, ADOLF D
• Application Number:
  US08/661,453
• Time in Patent Office: 287 Days
• Field of Search: 323/222, 363/44, 363/80, 363/81, 363/84, 363/89
• US Class Current: 323/222
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y02P 80/10 Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Abstract

This disclosure relates to a power supply circuit for converting AC energy from an AC source to DC energy for powering a load. The circuit comprises first and second circuit lines and a full wave rectifier connectable to the AC source and to the circuit lines for providing a rectified input voltage on the circuit lines. An inductor is connected in one of the circuit lines and an output capacitor is connected across the circuit lines between the inductor and the load. A control switch including two power terminals and a control terminal has the two power terminals connected across the circuit lines between the inductor and the output capacitor. A sensor responsive to current flow through the inductor provides a current representative signal. A relatively high fixed frequency oscillator closes the control switch in each cycle thereof. A circuit responsive to a comparison of the input and output voltages with the current representative signal opens the control switch when the current representative signal reaches a preset value based on the input plus the output voltages.

Claims

1. A power supply and power factor correction circuit comprising first and second circuit lines;

rectifier means having an output connected across said circuit lines and an input connectable to an AC source for providing a rectified DC input voltage on said circuit lines;

an inductor connected in one of said lines;

an output capacitor connected across said lines and a DC output voltage representative signal appearing across said output capacitor, said inductor being between said rectifier and said output capacitor;

a control switch including two power terminals and a control terminal, said two power terminals being connected across said power lines between said inductor and said output capacitor;

means responsive to current flow through said inductor for providing a current representative signal;

oscillator means having a fixed frequency higher than the frequency of the AC source and operatively connected to said control terminal for closing said control switch in each cycle thereof;

means responsive to said input voltage for providing an input voltage representative signal, reference means for providing a DC reference voltage. summing means for summing said input voltage representative signal and said reference voltage and forming a summation signal, error means responsive to said summation signal and to said output voltage representative signal for providing an error signal proportional to the difference between said output voltage representative signal and said summation signal, and comparison means responsive to said current representative signal and to said error signal for opening said control switch when said current representative signal reaches a preset value relative to said error signal.

2. A circuit as set forth in claim 1, wherein said current flow responsive means is connected in series with said control switch.

3. A circuit as set forth in claim 1, wherein said current flow responsive means is connected in one of said circuit lines.

4. A circuit as set forth in claim 1, wherein said current flow responsive means is connected in said input of said rectifier means.

5. A circuit as set forth in claim 1, wherein said means responsive to said input voltage is connected to said circuit lines between said rectifier means and said inductor.

6. A circuit as set forth in claim 1, and further comprising a flip-flop including set and reset inputs and an output, said output being connected to said control terminal, said input being connected to said comparison means, and said set input being connected to said oscillator means.

7. A power factor correction circuit comprising first and second circuit lines operable to be connected to an output of a rectifier for providing a rectified DC input voltage on said circuit lines;

an inductor connected in one of said lines;

an output capacitor connected across said lines and a DC output voltage representative signal appearing across output capacitor, said inductor being between said rectifier and said output capacitor;

a control switch including two power terminals and a control terminal, said two power terminals being connected across said power lines between said inductor and said output capacitor;

means responsive to current flow through said inductor for providing a current representative signal;

oscillator means having a fixed frequency higher than the frequency of the AC source and operatively connected to said control terminal for closing said control switch in each cycle thereof;

means responsive to said input voltage for providing an input voltage representative signal, reference means for providing a DC reference voltage, summing means for summing said input voltage representative signal and said reference voltage and forming a summation signal, error means responsive to said summation signal and to said output voltage representative signal for providing an error sisal proportional to the difference between said output voltage representative signal and said summation signal, and comparison means responsive to said current representative signal and to said error signal for opening said control switch when said current representative signal reaches a preset value relative to said error signal.

8. A circuit as set forth in claim 7, wherein said current flow responsive means is connected in series with said control switch.

9. A circuit as set forth in claim 7, wherein said current flow responsive means is connected in one of said circuit lines.

10. A circuit as set forth in claim 7, wherein said means responsive to said input voltage is connected to said circuit lines.

11. A circuit as set forth in claim 7, and further comprising a flip-flop including set and reset inputs and an output, said output being connected to said control terminal, said reset input being connected to said comparison means, and said set input being connected to said oscillator means.

12. A power supply and power factor correction circuit, comprising first and second circuit lines;

a full wave rectifier connected to said circuit lines for forming a rectified input voltage on said circuit lines;

an inductor connected in said first circuit line;

an output capacitor connected across said circuit lines, said inductor being between said output capacitor and said rectifier;

a control switch including two power terminals and a control terminal, said power terminals being connected across said lines between said inducter and said output capacitor;

current means responsive to current through said inducter for providing an inductor current representative signal;

a flip-flop having an output connected to said control terminal and having set and reset inputs;

a fixed frequency oscillator connected to said set input;

a comparator having first and second comparator inputs and an output connected to said reset input; and

voltage means responsive to an error between said input voltage and a reference voltage and to an output voltage on said output capacitor for providing a voltage representative signal, said voltage representative signal being connected to said first comparator input;

said second comparator input being connected to receive said inductor current representative signal;

said comparator forming a comparison signal which resets said flip-flop when said inductor current representative signal reaches said voltage representative signal at substantially the peak of said inductor current representative signal.