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Semiconductor memory device

  • US 5,615,163 A
  • Filed: 02/08/1996
  • Issued: 03/25/1997
  • Est. Priority Date: 12/21/1993
  • Status: Expired due to Term
First Claim
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1. A semiconductor memory device comprising:

  • a memory cell array comprising a plurality of memory cell units arranged in a matrix form, each memory cell unit having a plurality of memory cells connected to one another;

    a plurality of word-line drivers which are arranged in two rows, said word-line drivers, except at least one located at ends of rows, being divided into groups each including two word-line drivers, said groups of two word-line drivers and at least one word-line driver located at ends of rows being provided alternatively on a first and a second side of said memory cell array;

    word lines for selecting said memory cells when driven by said word-line drivers, said word-lines being divided into word-line blocks each connected at a first end to one memory cell unit and at a second end to one word-line driver;

    bit lines for writing and reading data to and from said memory cells;

    row selecting means for selecting said word lines; and

    column selecting means for selecting said bit lines;

    wherein said word-line blocks are arranged in a row, said word-line blocks, except at least one located at ends of the row, are divided into groups of two word-line blocks and the two word-line blocks of each group are connected to the two word-line drivers of one group, respectively.

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