Semiconductor integrated circuit device and fabrication method thereof

• US 5,616,520 A
• Filed: 12/30/1994
• Issued: 04/01/1997
• Est. Priority Date: 03/30/1992
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Hitachi, Ltd., Hitachi Vlsi Engineering Corporation (Hitachi, Ltd.)
• Inventors: Takahashi, Hiroyuki, Suwa, Motoo, Nakazato, Norio, Nishiuma, Masahiko, Kamada, Chiyoshi
• Primary Examiner(s): PICARDAT, KEVIN M
• Application Number:
  US08/367,490
• Time in Patent Office: 823 Days
• Field of Search: 437/209, 437/211, 437/212, 437/214, 437/215, 437/217, 437/182, 437/183
• US Class Current: 438/125
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/06131 being uniform, i.e. having a uniform pitch across the array
• CPC Class Codes: H01L 2224/1134 Stud bumping, i.e. using a wire-bonding apparatus
• CPC Class Codes: H01L 2224/1184 involving a mechanical process, e.g. planarising the bump connector
• CPC Class Codes: H01L 2224/1308 being stacked
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/749 Tools for reworking, e.g. for shaping
• CPC Class Codes: H01L 2224/75 Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 2224/75753 Means for optical alignment, e.g. sensors
• CPC Class Codes: H01L 2224/78301 Capillary
• CPC Class Codes: H01L 2224/81193 wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/81208 applying unidirectional static pressure
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 23/367 : Cooling facilitated by shape of device H01L23/38, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence
• CPC Class Codes: H01L 23/3672 : Foil-like cooling fins or heat sinks being part of lead-frames H01L23/49568
• CPC Class Codes: H01L 23/3677 : Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/433 : Auxiliary members in containers characterised by their shape, e.g. pistons
• CPC Class Codes: H01L 23/66 : High-frequency adaptations
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/75 : Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: Y10T 29/49144 : by metal fusion

Abstract

A semiconductor device is fabricated by forming first metal balls on electrode pads of a semiconductor chip. The first metal balls each can have a sharp tipped anchor. All of the anchors simultaneously flattened slightly only to the extent of equalizing the height thereof. The first metal balls are bonded to electrodes formed on a substrate with wirings by embedding the anchors into the electrodes. Alternatively, second metal balls can be formed on the electrodes which are then flattened to equalize the height thereof. The first metal balls, either with or without the anchors, are bonded to the second metal balls. The first and second metal balls are preferably heated during the bonding step to soften the second metal balls.

Claims

1. A method of fabricating a semiconductor integrated circuit device comprising the steps of:

providing a semiconductor chip having a main surface, an integrated circuit and a plurality of electrode pads formed on said main surface;

providing a substrate having a main surface, a plurality of wiring electrodes and a plurality of wirings formed on said main surface, one end of each of the wirings electrically connected to the respective wiring electrodes, said substrate having a plurality of leads, each of which is electrically connected to one of other ends of said wirings;

forming first gold balls on said electrode pads of said semiconductor chip by a thermo-compression ball-bonding method;

forming second gold balls on said wiring electrodes of said substrate by said thermo-compression ball-bonding method;

simultaneously flattening said second gold balls formed on said substrate by pressing said gold balls with a flat surface to form gold wiring lands; and

bonding said first gold balls formed on said main surface of said chip to said wiring lands.

2. A method of fabricating a semiconductor integrated circuit device according to claim 1, wherein a square frame for surrounding said plurality of lands is formed on said substrate for providing a cavity in which said semiconductor chip is mounted.

3. A method of fabricating a semiconductor integrated circuit device according to claim 2, further comprising the step of:

sealing the semiconductor chip in the cavity by providing a quadrilateral sealing body on the frame.

4. A method of fabricating a semiconductor integrated circuit device according to claim 2, further comprising the step of:

bonding heat conductive means made of a metal to one surface of a quadrilateral sealing body, and sealing the semiconductor chip in the cavity by attaching the sealing body to the frame so that the heat conductive means contacts a back surface of the semiconductor chip facing the main surface of the semiconductor chip.

5. A method of fabricating a semiconductor integrated circuit device according to claim 4, wherein the heat conductive means are gold ribbons.

6. A method of fabricating a semiconductor integrated circuit device according to claim 4, wherein the heat conductive means are gold wires.

7. A method of fabricating a semiconductor integrated circuit device according to claim 4, wherein the heat conductive means are gold bumps.

8. A method of fabricating a semiconductor integrated circuit device according to claim 2, further comprising the step of:

bonding a plurality of heat conductive means of metallic bumps to one surface of a quadrilateral sealing body, and sealing the semiconductor chip in the cavity by attaching the sealing body to the frame so that the heat conductive means contacts a back surface of the semiconductor chip facing the main surface of the semiconductor chip.

9. A method of fabricating a semiconductor integrated circuit device according to claim 1, further comprising the steps of:

forming third gold balls on said first balls formed on said semiconductor chip by said thermo-compression ball-bonding method.

10. A method of fabricating a semiconductor integrated circuit device according to claim 1, wherein a metallic board is attached to a back surface of the substrate opposite the main surface.

11. A method of fabricating a semiconductor integrated circuit device according to claim 1, wherein at least one of said first gold balls has a sharp tipped anchor.

12. A method of fabricating a semiconductor integrated circuit device according to claim 11, further comprising the step of slightly flattening said anchors to equalize the height of the first gold balls prior to bonding said first gold balls to said second gold balls.

13. A method of fabricating a semiconductor integrated circuit device according to claim 11, further comprising the step of heating said first gold balls and said second gold balls during said bonding step.

14. A method of fabricating a semiconductor integrated circuit device according to claim 1, wherein said substrate includes a plurality of leads, each of said leads being electrically connected to one of other ends of said wirings.

19. A method of fabricating a semiconductor integrated circuit device according to claim 1, wherein said second metal balls are heated and softened at a temperature higher than the recrystallization temperature thereof during said bonding step.

15. A method of fabricating a semiconductor integrated circuit device comprising the steps of:

providing a semiconductor chip having a main surface, an integrated circuit and a plurality of electrode pads formed on said main surface;

providing a substrate having a main surface, a plurality of wiring electrodes and a plurality of wirings formed on said main surface, one end of each of the wirings electrically connected to the respective wiring electrodes;

forming first metal balls on said electrode pads of said semiconductor chip by a thermo-compression ball-bonding method, wherein said first metal balls each have an anchor;

forming second metal balls on said wiring electrodes of said substrate by said thermo-compression ball-bonding method;

simultaneously flattening said second metal balls formed on said substrate by pressing said second metal balls with a flat surface to equalize the height of said second metal balls, said flattened second balls forming wiring lands; and

bonding said first metal balls to said wiring lands by embedding the anchors of said first metal balls into said wiring lands.

16. A method of fabricating a semiconductor integrated circuit device according to claim 15, further comprising the step of slightly flattening said anchors to equalize the height of the first metal balls prior to bonding said first metal balls to said second metal balls.

17. A method of fabricating a semiconductor integrated circuit device according to claim 15, further comprising the step of heating said first metal balls and said second metal balls during said bonding step.

18. A method of fabricating a semiconductor integrated circuit device according to claim 15, wherein said first metal balls are heated and softened at a temperature lower than the recrystallization temperature thereof during said bonding step.

20. A method of fabricating a semiconductor integrated circuit device comprising the steps of:

providing a semiconductor chip having a main surface, an integrated circuit and a plurality of electrode pads formed on said main surface;

providing a substrate having a main surface, a plurality of wiring electrodes and a plurality of wirings formed on said substrate main surface, one end of each of the wirings electrically connected to the respective wiring electrodes;

forming first metal balls on said electrode pads of said semiconductor chip by a thermo-compression ball-bonding method, wherein said first metal balls each have an anchor;

forming second metal balls on said wiring electrodes of said substrate by a thermo-compression ball bonding method; and

bonding said first metal balls to said second metal balls by embedding the anchors of said first metal balls into said second metal balls.

21. A method of fabricating a semiconductor integrated circuit device comprising the steps of:

providing a semiconductor chip having a main surface, an integrated circuit and a plurality of electrode pads formed on said main surface;

providing a substrate having a main surface, a plurality of wiring electrodes and a plurality of wirings formed on said main surface, one end of each of the wirings electrically connected to the respective wiring electrodes;

forming first gold balls on said electrode pads of said semiconductor chip by a thermo-compression ball-bonding method;

forming second gold balls on said wiring electrodes of said substrate by said thermo-compression ball-bonding method;

simultaneously flattening said second gold balls formed on said substrate by pressing said gold balls with a flat surface to form gold wiring lands; and

bonding said first gold balls formed on said main surface of said chip to said wiring lands.