Semiconductor integrated circuit having N-channel and P-channel transistors

• US 5,616,935 A
• Filed: 02/01/1995
• Issued: 04/01/1997
• Est. Priority Date: 02/08/1994
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Takemura, Yasuhiko, Koyama, Jun
• Primary Examiner(s): Crane, Sara W.
• Assistant Examiner(s): Hardy, David B.
• Application Number:
  US08/382,410
• Time in Patent Office: 790 Days
• Field of Search: 257/66, 257/69, 257/72, 257/204, 257/206, 257/350, 257/347, 257/369, 257/392, 257/627, 257/628
• US Class Current: 257/69
• CPC Class Codes: H01L 21/8238 Complementary field-effect transistors, e.g. CMOS
• CPC Class Codes: H01L 27/0922 Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT

Abstract

The absolute value of the threshold voltage of a P-channel TFT is reduced by making its channel length shorter than that of an N-channel TFT by at least 20%, to thereby approximately equalize the threshold voltage absolute values of those TFTs.

Claims

1. A semiconductor integrated circuit having N-channel and P-channel thin-film transistors formed on an insulating surface, each channel region of said N-channel and P-channel thin-film transistors comprising a crystalline silicon layer having a <

111 >

crystal orientation, wherein a channel length of the P-channel thin-film transistor is shorter than that of the N-channel thin film transistor by at least 20% and an absolute value of a threshold voltage of said P-channel thin-film transistor is approximately equal to an absolute value of a threshold voltage of said N-channel thin-film transistor.

10. The semiconductor integrated circuit of claim 1, 2, or 5 wherein the crystal silicon layer of said N-channel and P-channel transistors is 300-5000 Å

thick.

11. The semiconductor integrated circuit of claim 1, 2, or 5 wherein the crystal silicon layer of said N-channel and P-channel transistors contains an N-type or P-type impurity at a concentration of not higher than 1×

10¹⁸ atoms/cm³.

2. A semiconductor integrated circuit having N-channel and P-channel thin-film transistors formed on an insulating surface, each channel region of said N-channel and P-channel thin-film transistors comprising a crystalline silicon layer having a <

111>

crystal orientation, wherein gate electrodes of the N-channel thin-film transistor and the P-channel thin-film transistor are connected to each other, and wherein a channel length of the P-channel thin-film transistor is shorter than that of the N-channel thin-film transistor by at least 20% and an absolute value of a threshold voltage of said P-channel thin-film transistor is approximately equal to an absolute value of a threshold voltage of said N-channel thin-film transistor.

3. A semiconductor integrated circuit comprising thin-film transistors each having a gate electrode that is mainly made of aluminum, wherein a channel length of a P-channel thin-film transistor is made shorter than that of an N-channel thin-film transistor to approximately equalize an absolute value of threshold voltages of the P-channel and N-channel thin-film transistors.

4. A semiconductor integrated circuit having at least one complementary P-channel and N-channel transistors formed on an insulating surface, said P-channel and N-channel transistors having respective gate electrodes comprising aluminum, wherein a channel length of the P-channel thin-film transistor is shorter than that of the N-channel thin-film transistor by at least 20% and an absolute value of a threshold voltage of said P-channel transistor is approximately equal to an absolute value of a threshold voltage of said N-channel transistor.

5. A semiconductor integrated circuit comprising p-channel and n-channel thin film transistors each having a gate electrode comprising aluminum, wherein the width of the gate electrode of said p-channel transistor in a direction along source and drain regions is shorter than that of said n-channel transistor by at least 25% and wherein a channel region of said thin film transistors comprises crystalline silicon having <

111>

crystal orientation and an absolute value of a threshold voltage of said P-channel transistor is approximately equal to an absolute value of a threshold voltage of said N-channel transistor.

6. The semiconductor integrated circuit of claim 5 wherein the width of the gate electrode of said p-channel transistor is shorter than that of said n-channel transistor by 25-80%.

7. The semiconductor integrated circuit of claim 5 wherein a channel region of each of said p-channel and n-channel thin film transistors comprises a non-single crystalline silicon having a crystallinity.

8. The semiconductor integrate circuit of claim 7 wherein said non-single crystalline silicon is polysilicon.

9. The semiconductor integrated circuit of claim 5 wherein said p-channel transistor and n-channel transistor each contains N-type or P-type impurity at a concentration not higher than 1×

10¹⁸ atoms/cm³.