Method and system for screening reliability of semiconductor circuits

• US 5,617,038 A
• Filed: 06/07/1995
• Issued: 04/01/1997
• Est. Priority Date: 07/07/1992
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Houston, Theodore W.
• Primary Examiner(s): Karlsen, Ernest F.
• Application Number:
  US08/482,067
• Time in Patent Office: 664 Days
• Field of Search: 324/765, 324/768, 324/769, 324/158.1, 371/21.1, 371/21.4, 371/25.1, 371/28
• US Class Current: 324/762.01
• CPC Class Codes: G01R 31/3163 Functional testing

Abstract

A method and system for screening semiconductor circuits is disclosed herein. A circuit 50, such as an SOI circuit, is provided. The circuit includes a plurality of transistors and is coupled to a supply voltage node V_DD, a reference node V_SS, and a substrate node V_SUB. A supply voltage is applied to the supply node while a reference voltage is applied to the reference node and a test voltage is applied to the substrate node. The current I_DD flowing to the supply and/or reference node is then measured. These steps are repeated for a plurality of test circuits to determine at least one performance and/or reliability criterion. The steps can then be repeated to screen other circuits by comparing the measured current to the reliability limit(s).

Claims

1. A system for testing a semiconductor which includes a circuit having a plurality of transistors, said circuit further including a supply voltage node, a reference node and a substrate node, said system comprising:

circuitry for applying a supply voltage to said supply voltage node of said circuit;

circuitry for applying a reference voltage to said reference node of said circuit;

circuitry for applying a test voltage to said substrate node of said circuit;

circuitry for measuring a current flowing to said supply node such that the current flowing to the supply node can be compared to a predetermined current criterion to obtain performance information about said circuit.

2. The system of claim 1 wherein said performance information comprises information on radiation hardness of said circuit.

3. The system of claim 1 wherein said performance information comprises information on the reliability of said circuit.

4. The system of claim 1 wherein said circuit comprises a silicon-on-insulator circuit.

5. The system of claim 1 wherein said system for testing comprises a system for performing a screening test prior to packaging of said semiconductor circuit.