Automatic surge suppressor disconnect protection system

• US 5,617,288 A
• Filed: 06/05/1995
• Issued: 04/01/1997
• Est. Priority Date: 06/05/1995
• Status: Expired due to Term

• Current Assignee: Leviton Manufacturing Company Incorporated
• Original Assignee: Leviton Manufacturing Company Incorporated
• Inventors: Zaretsky, Albert
• Primary Examiner(s): Gaffin, Jeffrey A.
• Assistant Examiner(s): MEDLEY, SALLY C
• Application Number:
  US08/465,663
• Time in Patent Office: 666 Days
• Field of Search: 361/127, 361/119, 361/103, 361/91, 361/42, 361/15, 361/17, 361/16
• US Class Current: 361/127
• CPC Class Codes: H02H 9/042 comprising means to limit the absorbed power or indicate damaged over-voltage protection device

Abstract

A surge suppressor disconnect protection circuit is coupled to a first surge suppressor electrically coupled to the terminals of an AC source to protect the first surge suppressor from predetermined overvoltages. The circuit includes a relay switch connected in series with the first surge connected to the AC source terminals for rectifying the AC to generate a DC signal. The adjuster filters the DC signal and scales the filtered DC signal. An amplifier is electrically coupled to the adjuster and to and providing a difference signal integrator time constant is electrically connected to the amplifier and produces a signal which is proportional to a length of time the scaled DC signal is greater than the first voltage reference. A comparator is connected to a second voltage reference. The comparator output is electrically coupled to the relay switch which opens the switch contact to set it to a high impedance state when the integrator output signal exceeds the second voltage reference.

Claims

1. A surge suppressor disconnect protection circuit for protecting a first surge suppressor from overvoltages, said first surge suppressor electrically coupled between phase and neutral terminals which electrically connect to an AC source, said protection circuit comprising:

switching means including a contact setable to one of a high and a low impedance state in accordance with an interrupt signal, said switching means electrically connected between said first surge suppressor and one of said terminals;

signal adjuster means electrically connected between said phase and neutral terminals for rectifying AC from said AC source to generate a DC signal, filtering and scaling said DC signal;

amplifier means electrically coupled to said adjuster means at a non-inverting input port, at an inverting input to a first voltage reference and at an output port back to its inverting input port, wherein a difference signal indicative of a difference between said first reference signal and said DC signal is provided at said output port;

integrator means electrically coupled to said amplifier means for generating a timer signal a magnitude of which is proportional to a magnitude of said difference signal and a time said difference signal is defined at said magnitude; and

comparing means for comparing said timer signal to a second reference signal and generating said interrupt signal based thereon.

2. The protection circuit defined according to claim 1, further including current fusing means electrically connected in series to said first surge suppressor for protecting said suppressor from transients within a kiloamp/microsecond range.

3. The protection circuit defined according to claim 1, wherein said difference is proportional to a difference between said overvoltage and a maximum voltage of which said first surge suppressor may be subjected without sustaining permanent damage.

4. The protection circuit defined according to claim 3, wherein said first reference signal is substantially proportional to an overvoltage which is less than a maximum rated voltage of said first surge suppressor but large enough to cause substantial heating within said first surge suppressor.

5. The protection circuit defined according to claim 1, wherein said interrupt signal is generated just prior to a predetermined time at which said first surge suppressor would suffer heat damage when subjected to overheating pursuant from said overvoltage.

6. The protection circuit defined by claim 1, wherein said difference is positive when said DC signal is greater than said first reference signal and negative when said DC signal is less than said first reference signal.

7. The protection circuit defined by claim 1, further including a second surge suppressor electrically interposed between said amplifier output port and said integrator means.

8. The protection circuit as defined by claim 7, wherein said second surge suppressor simulates nonlinear voltage, current and thermal characteristics representative of said first surge suppressor such that a non-linear time constant is imparted to said integrator means.

9. The protection circuit defined by claim 8, wherein said second surge suppressor is a metal oxide varistor.

10. The protection circuit defined by claim 9, wherein said second metal oxide varistor is a low-power and low-voltage metal oxide varistor.

11. The protection circuit defined by claim 1, wherein said integrator means includes a resistor connected between an integrator input port and ground and a capacitor connected between said input port and an output port.

12. The protection circuit defined by claim 1, further including a buffer amplifier interposed between said comparing means and a first end of a relay coil, said relay coil for placing said switching means into said high impedance state.

13. The protection circuit defined by claim 1, wherein said first surge suppressor is a metal oxide semiconductor varistor (MOV).

14. The protection circuit defined by claim 1, wherein said phase and neutral terminals are electrically connected to a circuit protected by said first surge suppressor.

15. The protection circuit according to claim 1, wherein said switching means returns to said high impedance state when said overvoltages are no longer present between said phase and neutral terminals.

16. A method for protecting a surge suppresser device from predetermined overvoltage conditions, said surge suppresser device connected across a phase and a neutral of an AC source, said method comprising the steps of:

determining a critical voltage at which said surge suppressor device will sustain damage;

determining a critical time for which said surge suppressor device may be subjected to said critical voltage without sustaining damage;

determining whether an overvoltage applied to said surge suppressor device exceeds said critical voltage;

developing a signal derived from said overvoltage and subsequently subject to a non-linearity proportional to the non-linear characteristics of said surge suppressor device;

integrating said signal over time; and

disconnecting said surge suppressor device from said AC source when said integrated signal exceeds a predetermined threshold.

17. A ground fault circuit interrupter system including surge suppressor protection comprising:

a ground fault circuit interrupter electrically connected to phase and neutral terminals of an AC source;

a first surge suppressor electrically coupled to said phase and neutral terminals, respectively, for protecting said ground fault circuit interrupter from predetermined overvoltages; and

a surge suppressor disconnect protection circuit electrically coupled to said first surge suppressor and said phase and neutral terminals for protecting said surge suppressor from said predetermined overvoltages by disconnecting said first surge suppressor from said AC source under predetermined conditions, said surge suppressor disconnect protection circuit comprising;

a relay switch including a relay contact and a relay drive coil each having first and second ends, wherein said relay contact is settable to one of a high and a low impedance state in accordance with a disconnect signal and wherein said contact is electrically connected at said first end to a first end of said surge suppressor and at said second end to one of said phase and neutral terminals;

signal adjuster means including phase, neutral and DC ports, wherein said phase port is electrically connected to said phase terminal and said neutral port is electrically connected to said neutral terminal and wherein said adjuster means rectifies AC present at said phase and neutral ports to generate a DC signal, filters and scales said DC signal and provides said scaled DC signal at said DC port;

amplifier means including an inverting input port, a non-inverting input port, and an amplifier output port, wherein said non-inverting input port is electrically coupled to said signal adjuster DC port, said inverting input port is electrically coupled to a first voltage reference signal and said amplifier means output port is electrically coupled to said inverting input port to provide a feedback path therebetween such that a difference signal equal to a difference between a first voltage reference signal and said scaled DC is provided at said amplifier output port;

an integrator having an input port and an output port, said integrator input port electrically coupled to said amplifier output port wherein said integrator generates a time-out signal at said integrator output port which is proportional to said difference signal and a time at which said difference signal is present; and

a comparator having a non-inverting input port, an inverting input port and an output port, said non-inverting comparator input port electrically connected at said non-inverting input port to said integrator output port, said integrator inverting input port electrically connected to a second voltage reference signal and said integrator output port electrically coupled to said first end of said relay coil, wherein a disconnect signal is generated in accordance with a comparison of said time-out signal and said second voltage reference signal.

18. The ground fault circuit interrupter system defined by claim 17, further including a second surge suppressor interposed between said amplifier means and said integrator.

19. The ground fault circuit interrupter system defined by claim 17, wherein said first and said second surge suppressors comprise metal oxide varistors.

20. A surge suppresser disconnect protection system circuit for protecting a first surge suppressor from overvoltages, said first surge suppressor electrically coupled to phase and neutral terminals of an AC source, comprising:

a relay switch including a relay contact and relay drive coil each having first and second ends, wherein said relay contact is settable to one of a high and a low impedance state in accordance with an interrupt signal provided across said coil and wherein said contact is electrically coupled between said first surge suppressor and said AC source phase terminal;

signal adjuster means including phase, neutral and DC ports, wherein said adjuster means phase port is electrically connected to said AC source phase terminal and said neutral port is electrically connected to said AC source neutral terminal for rectifying AC to generate a DC signal, filtering and scaling said DC signal;

an amplifier including a non-inverting input port, an inverting input port and an amplifier output port, said non-inverting input port electrically coupled to said adjuster means DC port, said inverting input port coupled to a first voltage reference and to said amplifier output port to form a feedback path such that a difference signal substantially equal to a difference between a first reference signal and said DC signal is generated and provided at said amplifier output port;

an integrator electrically coupled to said amplifier output port for generating a timer signal which is proportional to said difference signal and a time duration for which said difference signal is present; and

a comparator electrically connected to said integrator and to a second reference signal for detecting a difference therebetween and generating said interrupt signal when said difference drops to around zero.

21. The surge suppressor disconnect protection circuit defined by claim 20, wherein said first surge suppressor is an MOV device.