Direct-conversion receiver for digital-modulation signal with signal strength detection
First Claim
1. A direct-conversion receiver comprising:
- a direct-conversion demodulator;
first means for sampling an output signal of the demodulator;
a memory;
an adder for adding an output signal of the memory and an output signal of the first means;
second means for storing an output signal of the adder into the memory, wherein results of the adding of "n" output signals of the first means which relate to a signal periodically transmitted from a transmitting station "n" times are present in the memory at a final stage, wherein "n" denotes a natural number equal to 2 or greater; and
third means for reading out signals representative of the results of the adding from the memory.
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Accused Products
Abstract
A direct-conversion receiver includes a direct-conversion demodulator. A first device detects a strength of a received signal. A clock signal generator outputs a clock signal in response to a reception start signal. The clock signal has a frequency corresponding to a symbol rate or higher. A second device samples an output signal of the demodulator at a timing determined by the clock signal. A third device samples an output signal of the first device at a timing determined by the clock signal. A fourth device stores "n" output signals of the second device which relate to a signal periodically transmitted from a transmitting station "n" times, wherein "n" denotes a natural number equal to 2 or greater. A fifth device stores "n" output signals of the third device which correspond in timing to the "n" output signals of the second device. A sixth device reads out signals from the fourth device, and reads out signals from the fifth device. The sixth device weights the signals read out from the fourth device in response to the signals read out from the fifth device. A seventh device combines output signals of the sixth device.
130 Citations
11 Claims
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1. A direct-conversion receiver comprising:
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a direct-conversion demodulator; first means for sampling an output signal of the demodulator; a memory; an adder for adding an output signal of the memory and an output signal of the first means; second means for storing an output signal of the adder into the memory, wherein results of the adding of "n" output signals of the first means which relate to a signal periodically transmitted from a transmitting station "n" times are present in the memory at a final stage, wherein "n" denotes a natural number equal to 2 or greater; and third means for reading out signals representative of the results of the adding from the memory.
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2. A direct-conversion receiver comprising:
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a direct-conversion demodulator; first means for detecting a strength of a received signal; a clock signal generator for generating a clock signal in response to a reception start signal, the clock signal having a frequency corresponding to a symbol rate or higher; second means for sampling an output signal of the demodulator at a first timing determined by the clock signal; third means for sampling an output signal of the first means at a second timing determined by the clock signal; fourth means for storing "n" output signals of the second means which relate to a signal periodically transmitted from a transmitting station "n" times, wherein "n" denotes a natural number equal to 2 or greater; fifth means for storing "n" output signals of the third means which correspond in timing to the "n" output signals of the second means; sixth means for reading out signals from the fourth means and reading out signals from the fifth means, and for weighing the signals read out from the fourth means in response to the signals read out from the firth means; and seventh means for combining output signals of the sixth means. - View Dependent Claims (3)
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4. A direct-conversion receiver comprising:
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a direct-conversion demodulator; first means for detecting a strength of a received signal; second means for sampling an output signal of the demodulator; third means for sampling an output signal of the first means; fourth means for storing "n" output signals of the second means which relate to a signal periodically transmitted from a transmitting station "n" times, wherein "n" denotes a natural number equal to 2 or greater; fifth means for storing "n" output signals of the third means which correspond in timing to the "n" output signals of the second means; sixth means for reading out signals from the fourth means and reading out signals from the fifth means, and for weighing the signals read out from the fourth means in response to the signals read out from the fifth means; and seventh means for combining output signals of the sixth means. - View Dependent Claims (5)
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6. A direct-conversion receiver comprising:
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a direct-conversion demodulator; first means for detecting a strength of a received signal; a clock signal generator for generating a clock signal in response to a reception start signal, the clock signal having a frequency corresponding to a symbol rate or higher; second means for sapling an output signal of the demodulator at a first timing determined by the clock signal; third means for sampling an output signal of the first means at a second timing determined by the clock signal; fourth means for weighting an output signal of the second means in response to an output signal of the third means; a memory; an adder for adding an output signal of the memory and an output signal of the fourth means; fifth means for storing an output signal of the adder into the memory, wherein results of the weighting of "n" output signals of the second means which relate to a signal periodically transmitted from a transmitting station "n" times are present in the memory at a final stage, wherein "n" denotes a natural number equal to 2 or greater; and sixth means for reading out signals representative of the results of the weighting from the memory. - View Dependent Claims (7)
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8. A direct-conversion receiver comprising:
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a direct-conversion demodulator; first means for detecting a strength of a received signal; second means for sampling an output signal of the demodulator; third means for sampling an output signal of the first means; fourth means for weighting an output signal of the second means in response to an output signal of the third means; a memory; an adder for adding an output signal of the memory and an output signal of the fourth means; fifth means for storing an output signal of the adder into the memory, wherein results of the weighting of "n" output signals of the second means which relate to a signal periodically transmitted from a transmitting station "n" times are present in the memory at a final stage, wherein "n" denotes a natural number equal to 2 or greater; and sixth means for reading out signals representative of the results of the weighting from the memory. - View Dependent Claims (9)
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10. A direct-conversion receiver comprising:
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first means for receiving sequentially-transmitted first and second radio signals carrying first information and second information respectively, the first information and the second information being equal in content; a local oscillator outputting a signal having a frequency equal to a frequency of carriers of the first and second radio signals; a mixer for mixing the first and second radio signals received by the first means and the output signal of the local oscillator, and down-converting the first and second radio signals into first and second baseband signals representing the first information and the second information respectively; second means for detecting strengths of the first and second radio signals received by the first means; third means for weighting the first and second baseband signals in response to the detected strengths of the first and second radio signals, and thereby converting the first and second baseband signals into first and second weighted baseband signals respectively; and fourth means for combining the first and second weighted baseband signals into a composite baseband signal. - View Dependent Claims (11)
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Specification