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Method of cell placement for an itegrated circuit chip comprising integrated placement and cell overlap removal

  • US 5,619,419 A
  • Filed: 09/13/1994
  • Issued: 04/08/1997
  • Est. Priority Date: 09/13/1994
  • Status: Expired due to Term
First Claim
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1. A computer implemented method of spatially distributing cells in a cell placement for an integrated circuit chip, comprising the steps of:

  • (a) computing a density map representing cell densities in incremental blocks of said placement respectively;

    (b) computing, from the density map, a warp map representing first repulsive forces exerted at centers of said blocks by cell densities in surrounding blocks respectively;

    (c) interpolating, from the warp map, second repulsive forces acting on selected cells in the placement; and

    (d) spatially distributing said selected cells in accordance with said second repulsive forces.

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