Methods for fabricating monolithic device containing circuitry and suspended microstructure

• US 5,620,931 A
• Filed: 06/06/1995
• Issued: 04/15/1997
• Est. Priority Date: 08/17/1990
• Status: Expired due to Term

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Tsang, Robert W. K., Core, Theresa A.
• Primary Examiner(s): Powell, William
• Application Number:
  US08/468,879
• Time in Patent Office: 679 Days
• Field of Search: 73/514.16, 437/228 SEN, 437/927, 216/2, 156/647.1, 156/657.1, 156/659.11, 156/662.1
• US Class Current: 438/50
• CPC Class Codes: B81B 3/001 Structures having a reduced contact area, e.g. with bumps or with a textured surface
• CPC Class Codes: B81C 1/00214 Processes for the simultaneaous manufacturing of a network or an array of similar microstructural devices
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 1/0092 For avoiding stiction during the manufacturing process of the device, e.g. during wet etching
• CPC Class Codes: B81C 2201/112 Depositing an anti-stiction or passivation coating, e.g. on the elastic or moving parts
• CPC Class Codes: B81C 2203/0735 Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
• CPC Class Codes: B81C 99/0035 Testing
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: G01P 15/131 with electrostatic counterbalancing means
• CPC Class Codes: G01P 2015/0814 for translational movement of the mass, e.g. shuttle type

Abstract

A monolithic capacitance-type microstructure includes a semiconductor substrate, a plurality of posts extending from the surface of the substrate, a bridge suspended from the posts, and an electrically-conductive, substantially stationary element anchored to the substrate. The bridge includes an element that is laterally movable with respect to the surface of the substrate. The substantially stationary element is positioned relative to the laterally movable element such that the laterally movable element and the substantially stationary element form a capacitor. Circuitry may be disposed on the substrate and operationally coupled to the movable element and the substantially stationary element for processing a signal based on a relative positioning of the movable element and the substantially stationary element. A method for fabricating the microstructure and the circuitry is disclosed.

Claims

1. A process for fabricating a monolithic device, comprising the steps of:

(1) providing a substrate having a first surface region for formation of a circuit and a second surface region for formation of a suspended microstructure;

(2) forming transistors in the first surface region of said substrate;

(3) forming a spacer layer over the second surface region of said substrate;

(4) forming at least one anchor opening in said spacer layer;

(5) forming a patterned polysilicon layer over said spacer layer and said anchor opening to define said microstructure;

(6) forming conductive paths for electrically interconnecting said transistors to form said circuit and for electrically interconnecting said microstructure to said circuit; and

(7) removing said spacer layer to release said suspended microstructure.

2. A process for fabricating a monolithic device as defined in claim 1 wherein the step of forming transistors includes forming an oxide layer and other dielectric layers over the first surface region and the second surface region of said substrate and wherein the process further includes the steps of:

forming an etch stop layer over the first surface region of said substrate following step (2),

removing said other dielectric layers from the second surface region of said substrate, and

forming a passivating layer over the second surface region of said substrate.

3. A process for fabricating a monolithic device as defined in claim 1 further including the step of forming a protective layer over said polysilicon layer in the second surface region of said substrate prior to the step of forming conductive paths.

4. A process for fabricating a monolithic device as defined in claim 3 wherein said protective layer comprises silicon oxide.

5. A process for fabricating a monolithic device as defined in claim 1 further including the step of forming a passivating layer over the first surface region of said substrate before the step of removing said spacer layer.

6. A process for fabricating a monolithic device as defined in claim 1 wherein the step of forming a spacer layer includes forming a silicon oxide spacer layer.

7. A process for fabricating a monolithic device as defined in claim 1 wherein the step of forming a patterned polysilicon layer includes the steps of depositing a polysilicon layer over said spacer layer and etching said polysilicon layer to form said patterned polysilicon layer.

8. A process for fabricating a monolithic device as defined in claim 1 wherein the step of forming a patterned polysilicon layer includes implanting ions into said polysilicon layer to establish a desired conductivity of said polysilicon layer.

9. A method for fabricating a monolithic device as defined in claim 1 further including the step of removing said spacer layer from the first surface region of said substrate.

10. A process for fabricating a monolithic device, comprising the steps of:

(1) providing a substrate having a first surface region for formation of a circuit and a second surface region for formation of a suspended microstructure;

(2) forming transistors in the first surface region of said substrate, the step of forming transistors including forming an oxide layer and other dielectric layers over the first surface region and the second surface region of said substrate;

(3) forming an etch stop layer over the first surface region of said substrate;

(4) removing said other dielectric layers from the second surface region of said substrate;

(5) forming a passivating layer over the second surface region of said substrate;

(6) forming a spacer layer over the second surface region of said substrate;

(7) forming at least one anchor opening in said spacer layer;

(8) forming a patterned polysilicon layer over said spacer layer in the second surface region of said substrate, said patterned polysilicon layer defining said microstructure;

(9) forming a protective layer over said patterned polysilicon layer in the second surface region of said substrate;

(10) forming final conductive paths for electrically interconnecting said transistors to form said circuit and for electrically interconnecting said microstructure to said circuit; and

(11) removing said spacer layer to release said suspended microstructure.

11. A process for fabricating a monolithic device as defined in claim 10 wherein the step of forming a spacer layer includes forming a silicon oxide spacer layer.

12. A process for fabricating a monolithic device as defined in claim 10 wherein the step of forming a patterned polysilicon layer includes depositing a polysilicon layer over said spacer layer and etching said polysilicon layer to form said patterned polysilicon layer.

13. A process for fabricating a monolithic device as defined in claim 12 wherein the step of forming a patterned polysilicon layer further includes implanting ions into said polysilicon layer to established a desired conductivity of said polysilicon layer.

14. A process for fabricating a monolithic device as defined in claim 10 further including a step of removing said spacer layer from the first surface region of said substrate.

15. A process for fabricating a monolithic device as defined in claim 10 further including forming a passivating layer over the first surface region of said substrate prior to removing said spacer layer.

16. A process for fabricating a suspended microstructure on a substrate, comprising the steps of:

(1) forming a spacer layer over the substrate;

(2) forming at least one anchor opening in said spacer layer;

(3) forming a polysilicon layer over said spacer layer and said anchor opening;

(4) implanting ions into said polysilicon layer to establish a desired conductivity of said polysilicon layer;

(5) patterning said polysilicon layer to define the suspended microstructure; and

(6) removing said spacer layer to release said suspended microstructure.