Programmable erasure and programming time for a flash memory

• US 5,621,687 A
• Filed: 05/31/1995
• Issued: 04/15/1997
• Est. Priority Date: 05/31/1995
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Doller, Edward M.
• Primary Examiner(s): Dinh, Son T.
• Application Number:
  US08/456,908
• Time in Patent Office: 685 Days
• Field of Search: 365/185.14, 365/185.19, 365/185.22, 365/185.29, 365/185.33, 365/189.07, 365/218, 365/236
• US Class Current: 365/185.29
• CPC Class Codes: G11C 16/10 Programming or data input circuits

Abstract

A method for controlling the programming and erasure time of a nonvolatile memory array in a memory device. A first value is defined, the first value representing a predetermined number of times a program or erase operation is to be reinitiated on the memory array. A write state machine of the memory device then initiates a program or erase operation on the nonvolatile memory array. The nonvolatile memory array is subsequently verified to determine if the program or erase operation was successful. If unsuccessful, the program or erase operation is repeated either until successful, or until the operation is repeated the predetermined number of times.

Claims

1. A method of programming and erasing a nonvolatile memory array of a memory device, the method comprising the steps of:

(a) determining a user-defined first value representing a predetermined number of times an operation is to be reinitiated on the nonvolatile memory array;

(b) setting a pulse counter value to an initial value;

(c) initiating the operation on the nonvolatile memory array and incrementally changing the pulse counter value, wherein the operation is a program operation or an erase operation performed by a write state machine of the memory device;

(d) verifying the nonvolatile memory array to determine if the operation was successful;

(e) repeating steps (b) and (c) if the operation was not successful until the pulse counter value is equal to the predetermined number of times.

2. The method of claim 1, wherein the nonvolatile memory array comprises a flash electrically erasable programmable read only memory.

3. A method of programming and erasing a nonvolatile memory array comprising the steps of:

(a) setting a pulse counter value to an initial value;

(b) incrementally changing the pulse counter value upon commencement of an operation on the nonvolatile memory array, wherein the operation is one of a program operation and an erase operation;

(c) verifying the nonvolatile memory array to determine if the operation was successful;

(d) comparing the pulse counter value with a final value upon a determination that the operation was not successful; and

(e) repeating steps (b)-(d) unless the pulse counter value is equal to the final value.

4. The method of claim 3, wherein the final value is zero and step (b) further comprises the step of decrementing the pulse counter value by one.

5. The method of claim 3, wherein the initial value is zero and step (b) further comprises the step of incrementing the pulse counter value by one.

6. The method of claim 3, wherein the nonvolatile memory array comprises a flash electrically erasable programmable read only memory.

7. A method of programming and erasing a nonvolatile memory array comprising the steps of:

(a) setting a pulse counter value to an initial value;

(b) loading a final value in to a register;

(c) incrementing the pulse counter value upon commencement of an operation on the nonvolatile memory array, wherein the operation is one of a program operation and an erase operation;

(d) verifying the nonvolatile memory array to determine if the operation was successful;

(e) comparing the pulse counter value with the final value upon a determination that the operation was not successful; and

(f) repeating steps (b)-(e) if the pulse counter value is less than the final value.

8. The method of claim 7, wherein the nonvolatile memory array comprises a flash electrically erasable programmable read only memory.

9. A memory device, comprising:

(a) a nonvolatile memory array;

(b) storage means for accepting a maximum pulse value from a user of the memory device;

(c) control means for performing an operation on the nonvolatile memory array and reinitiating the operation if the nonvolatile memory array was not successfully programmed, wherein the operation is one of a program operation and an erase operation;

(d) counter means for counting a number of operations performed by the control means;

(e) means for detecting when the number of program operations is equal to the maximum pulse value and subsequently preventing the control means from reinitiating the operation.

10. The memory device of claim 9, wherein the nonvolatile memory array is a flash electrically erasable programmable read only memory.

11. A method of programming and erasing a nonvolatile memory array of a memory device, the method comprising the steps of:

(a) receiving a max pulse command from a microprocessor;

(b) receiving a user-defined first value from said microprocessor, said user-defined first value representing a predetermined number of times an operation is to be reinitiated on the nonvolatile memory array;

(c) initiating the operation on the nonvolatile memory array, wherein the operation is a program operation or an erase operation performed by a write state machine of the memory device;

(d) verifying the nonvolatile memory array to determine if the operation was successful; and

(e) repeating steps (b) and (c) if the operation was not successful until step (b) has been performed the predetermined number of times.

12. The method of claim 11, wherein step (b) further comprises the step of

storing said user-defined first value in a register.