Integrated circuit that performs multiple communication tasks
First Claim
1. An integrated circuit comprising:
- a memory that stores an audio coding algorithm, echo cancellation information, a modem processing algorithm, and audio data;
a signal converter operably coupled to the memory, wherein the signal converter provides an analog-to-digital input port and a digital-to-analog, output port for the integrated circuit, and wherein the analog-to-digital input port provides the audio data to the memory;
a central processing unit operably coupled to the memory via a first information bus, and has access to the entire memory, wherein the central processing unit executes at least a first portion of the audio coding algorithm upon the audio data and executes at least a first portion of the modem processing algorithm; and
a first co-processor operably coupled to only a portion of the memory, via a second information bus, the portion of the memory is used for storing the echo cancellation information, the first co-processor is coupled to the central processing unit, wherein the first co-processor contains an echo cancellation algorithm and performs, utilizing the echo cancellation information, the echo cancellation algorithm upon the audio data under control of the central processing unit.
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Accused Products
Abstract
An integrated circuit that provides multiple communication functions is accomplished by providing an integrated circuit (24) that includes memory (70) which stores an audio code algorithm, echo cancellation information, a modem processing algorithm, and audio data. The memory (70) is coupled via a data bus (50) to a signal converter (56), a central processing unit (58), and a first co-processor (72). The signal converter (56) provides an analog-to-digital input port (78) and a digital-to-analog output port (80) for the integrated circuit (24), wherein the audio data is received via the analog-to-digital input port (78). The central processing unit (58) executes at least a first portion of the audio coding algorithm upon the audio data and executes a first portion of the modem processing algorithm, while the first co-processor (72) executes an echo cancellation algorithm.
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Citations
41 Claims
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1. An integrated circuit comprising:
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a memory that stores an audio coding algorithm, echo cancellation information, a modem processing algorithm, and audio data; a signal converter operably coupled to the memory, wherein the signal converter provides an analog-to-digital input port and a digital-to-analog, output port for the integrated circuit, and wherein the analog-to-digital input port provides the audio data to the memory; a central processing unit operably coupled to the memory via a first information bus, and has access to the entire memory, wherein the central processing unit executes at least a first portion of the audio coding algorithm upon the audio data and executes at least a first portion of the modem processing algorithm; and a first co-processor operably coupled to only a portion of the memory, via a second information bus, the portion of the memory is used for storing the echo cancellation information, the first co-processor is coupled to the central processing unit, wherein the first co-processor contains an echo cancellation algorithm and performs, utilizing the echo cancellation information, the echo cancellation algorithm upon the audio data under control of the central processing unit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. An integrated circuit comprising:
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a memory that stores an audio coding algorithm, a modem processing algorithm, audio data, and transmit data; a signal converter operably coupled to the memory, wherein the signal converter provides an analog-to-digital input port and wherein the analog-to-digital input port provides audio data to the memory; a central processing unit operably coupled to the memory via a first information bus, wherein the central processing unit executes at least a first portion of the audio coding algorithm and at least a first portion of the modem processing algorithm upon the audio data to produce the transmit data; a first co-processor operably coupled to only a portion of the memory, via a second information bus, the portion of the memory is used for storing echo cancellation information, the first co-processor is coupled to the central processing unit, wherein the first co-processor contains an echo cancellation algorithm and performs, utilizing the echo cancellation information, the echo cancellation algorithm upon the audio data tinder control of the central processing unit; a modulation signal converter operably coupled to the memory, wherein the modulation signal converter receives first band analog data and converts the first band analog data to first digital data, and receives second digital data and converts the second digital data to a second band analog output; and a digital modulator operably coupled to the modulation signal converter and the memory, wherein the digital modulator produces the second digital data based on the transmit data and provides the second digital data to the modulation signal converter. - View Dependent Claims (15, 16)
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17. An integrated circuit for performing multiple communications tasks, comprising:
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a memory that stores audio information including echo cancellation information and tone generation data; a central processing unit, operably coupled to the memory via a first information bus, the central processing unit having access to all of the memory; a first co-processor operably coupled to only a portion of the memory, via a second information bus, the portion of the memory being used for storing the echo cancellation information, the first co-processor is coupled to the central processing unit, wherein the first co-processor contains an echo cancellation algorithm and performs, utilizing the echo cancellation information, the echo cancellation algorithm upon the audio data under control of the central processing unit; a second co-processor operably coupled to the central processing unit and to the memory, wherein the second co-processor executes, under control of the central processing unit, a user tone generation algorithm using the tone generation data; a third co-processor operably coupled to the memory and the central processing unit, wherein the third co-processor executes, under control of the central processing unit, art encryption algorithm; and a fourth co-processor operably coupled to the central processing unit, wherein the fourth co-processor executes, under control of the central processing unit, an equalization algorithm. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29)
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30. A method for performing multiple communication tasks by an integrated circuit, the method comprising the steps of:
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receiving first band data; converting the first band data into first digital data using a modulation signal converter; equalizing the first digital data into an equalized data stream; decoding the equalized data stream into decoded information using a first audio processor; processing the decoded information into first digitized audio data using the first audio processor; converting the first digitized audio data into an analog audio signal using a signal converter; converting an input analog signal into second digitized audio data using the signal converter; processing the second digitized audio data and performing echo-cancellation on the second digitized audio data to produce processed audio information using a second audio processor, the second audio processor only having access to a portion of a memory for storing the second digitized audio data via a dedicated bus; encoding the processed audio information into an encoded data stream using a third audio processor; converting the encoded data stream into second digital data using a digital modular; and converting second digital data into second band data using the modulation signal converter. - View Dependent Claims (31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41)
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Specification