Battery cell having an internal circuit for controlling its operation

• US 5,622,789 A
• Filed: 09/12/1994
• Issued: 04/22/1997
• Est. Priority Date: 09/12/1994
• Status: Expired due to Term

• Current Assignee: Apple Inc.
• Original Assignee: Apple Computer Incorporated (Apple Inc.)
• Inventors: Young, Steven J.
• Primary Examiner(s): Kalafut, Stephen
• Assistant Examiner(s): CHANEY, CAROL DIANE
• Application Number:
  US08/310,802
• Time in Patent Office: 953 Days
• Field of Search: 429/7, 429/49, 429/61, 429/62, 320/21, 320/27, 320/37, 320/38, 320/39
• US Class Current: 429/7
• CPC Class Codes: G01R 31/006 on road vehicles, e.g. automobiles or trucks testing of ignition installations peculiar to internal combustion engines F02P17/00
• CPC Class Codes: G01R 31/3648 comprising digital calculation means, e.g. for performing an algorithm
• CPC Class Codes: H01M 10/4257 Smart batteries, e.g. electronic circuits inside the housing of the cells or batteries
• CPC Class Codes: H01M 10/48 Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte constructional details of current conducting connections for detecting conditions inside cells or batteries, e.g. details of voltage sensing terminals, H01M50/569
• CPC Class Codes: H01M 10/486 for measuring temperature
• CPC Class Codes: H01M 6/42 Grouping of primary cells into batteries H01M6/40 takes precedence
• CPC Class Codes: H02J 7/00 Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• CPC Class Codes: H02J 7/0018 using separate charge circuits
• CPC Class Codes: H02J 7/0036 using connection detecting circuits H02J7/0034 takes precedence
• CPC Class Codes: Y02E 60/10 Energy storage using batteries

Abstract

A battery cell having a positive terminal, a negative terminal and a power producing core section (e.g., electrolyte) for systems, such as computer systems, cellular phones, etc. The battery cell also includes an internal circuit to monitor the state of the battery cell. The state that is monitored may include the temperature, charge level of the battery core section, the discharge/charge rate. The circuit may control the battery cell (e.g., cause charging of the battery cell). This internal circuit may be an integrated circuit, such as a microprocessor.

Claims

1. A battery cell comprising:

a positive terminal;

a negative terminal;

a battery cell core coupled to the negative terminal and positive terminal to provide power externally using the positive terminal and the negative terminal;

a circuit coupled to the battery cell core to monitor the battery cell state;

a bus coupled to the circuit and having separate bus terminals at both the positive and negative terminals to communicate conditions of the battery cell core; and

a charging device coupled to the battery cell core to charge the battery cell core.

2. The battery cell defined in claim 1 wherein the circuit comprises a processor.

3. The battery cell defined in claim 1 wherein the charging device comprises a transistor.

4. The battery defined in claim 1 wherein the bus comprises a wire bus to transfer communications between the circuit and a location external to the battery.

5. The battery cell defined in claim 1 wherein the circuit is coupled to and controls the charging device.

6. A battery cell comprising:

a positive terminal;

a negative terminal;

a battery cell core coupled to the negative terminal and positive terminal to provide power externally using the positive terminal and the negative terminal;

a circuit coupled to the battery cell core to monitor the battery cell state;

a wire bus having separate bus terminals at both the positive and negative terminals to transfer communications between the circuit and a location external to the battery.

7. The battery cell defined in claim 6 wherein the circuit comprises a processor.

8. The battery cell defined in claim 6 further comprising a temperature sensor that measures temperature of the battery cell core and a current sensor that measures current travelling through the battery cell core, and wherein the circuit is coupled to the temperature sensor and the current sensor and converts information received therefrom into a form for transfer.

9. A battery pack comprising:

a plurality of batteries, wherein each of the plurality of batteries includes

a positive terminal at a first end,

a negative terminal at a second end,

a first bus terminal at the first end, and

a second bus terminal at the second end,

and a communication mechanism coupled to the first bus terminal and the second bus terminal, and further wherein the plurality of batteries are coupled together in a serial chain, such that a communication bus is formed; and

a package encasing the plurality of batteries, wherein battery contacts of two of the plurality of batteries exit the package to provide power therefrom.

10. The battery defined in claim 9 wherein the package includes a bus terminal coupled to one of either the positive terminal or the negative terminal.

11. The battery defined in claim 9 wherein each of the plurality of batteries further comprises a circuit coupled to the communication mechanism to monitor the state of said each of the plurality of batteries.

12. The battery defined in claim 11 wherein the control device comprises a processor.

13. The battery defined in claim 9 wherein at least one of the plurality of batteries includes a charging mechanism to charge said one of the plurality of batteries.

14. The battery defined in claim 13 wherein the charging mechanism comprises a transistor.

15. A system comprising:

a plurality of electronic devices coupled together to provide at least one function;

a battery pack coupled to provide power to the plurality of electronic devices, wherein the battery pack comprises a battery cell having;

a positive terminal;

a negative terminal;

a battery cell core coupled to the negative terminal and the positive terminal to provide power externally therefrom using the positive terminal and the negative terminal;

an internal communication bus having separate bus terminals at the positive and negative terminals to transfer information between the battery cell and at least one of the plurality of electronic devices; and

a circuit coupled to the battery cell core to monitor the battery cell state.

16. The system defined in claim 15 wherein said one of the plurality of electronic devices obtains state information from the battery cell and programs the circuit in the battery cell based on the state information.

17. The system defined in claim 15 wherein the plurality of electronic devices comprises a processor, a memory and a bus coupling the processor and the memory.

18. A battery cell comprising:

a positive terminal;

a negative terminal;

a battery cell core coupled to the negative terminal and positive terminal to provide power externally using the positive terminal and the negative terminal;

an integrated circuit coupled to the battery cell core to monitor the battery cell state;

a bus with separate bus terminals at both the positive and negative terminals to transfer communications between the circuit and a location external to the battery.

19. A battery pack comprising:

a plurality of batteries, wherein each of the plurality of batteries includes

a positive terminal at a first end,

a negative terminal at a second end,

a first bus terminal at the first end, and

a second bus terminal at the second end,

and a communication bus coupled to the first bus terminal and the second bus terminal, and further wherein the bus terminals of the plurality of batteries are coupled to form a single bus; and

a package encasing the plurality of batteries, wherein a battery contact of each of two of the plurality of batteries exit the package to provide power therefrom.

20. The battery defined in claim 19 wherein the communication bus comprises a wire bus.

21. The battery defined in claim 19 wherein the package includes a bus terminal coupled to one of either the first bus terminal or the second bus terminal of one of the plurality of batteries.

22. The battery defined in claim 19 wherein each of the plurality of batteries further comprises a control device coupled to the communication bus to monitor said each of the plurality of batteries.

23. The battery defined in claim 22 wherein the control device comprises a processor.

24. The battery defined in claim 19 wherein at least one of the plurality of batteries includes a charging mechanism to charge itself.

25. The battery defined in claim 24 wherein the charging mechanism comprises a transistor.