System and method for creating and validating structural description of electronic system

• US 5,623,418 A
• Filed: 06/14/1993
• Issued: 04/22/1997
• Est. Priority Date: 04/06/1990
• Status: Expired due to Term

• Current Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Watkins, Daniel R., Rostoker, Michael D.
• Primary Examiner(s): Trans, Vincent N.
• Application Number:
  US08/077,304
• Time in Patent Office: 1,408 Days
• Field of Search: 364/488, 364/489, 364/490, 364/578, 395/500
• US Class Current: 716/102
• CPC Class Codes: G01R 31/31704 Design for test; Design verification concerning scan tests G01R31/318583; computer-aided design G06F30/00
• CPC Class Codes: G01R 31/318357 Simulation computer simulation of digital circuits G06F30/3308
• CPC Class Codes: G01R 31/318364 as a result of hardware simulation, e.g. in an HDL environment computer-aided simulation of circuits G06F30/3308
• CPC Class Codes: G01R 31/318378 of patterns for devices arranged in a network
• CPC Class Codes: G06F 11/261 by simulating additional hardware, e.g. fault simulation
• CPC Class Codes: G06F 30/30 Circuit design
• CPC Class Codes: G06F 30/323 Translation or migration, e.g. logic to logic, hardware description language [HDL] translation or netlist translation
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking
• CPC Class Codes: G06F 30/3308 using simulation

Abstract

A system for interactive design and simulation of an electronic circuit allowing a user to design a circuit by graphical entry and to view full or partial simulation and design results simultaneously, on a single display window. The user is able to define the form of a display of speed, delay, loading, symbols, simulation input and/or output values on each node and any path of the design. Simulation may be user-defined or other process time. The user is further able to view any information relevant to any object in the design at any level of design abstraction, and is able to view multiple levels of design abstraction simultaneously and to display information common to the various representations.

Claims

1. A method of creating an electronic design on an ECAD system having a computer, a database accessible to the computer, design tools running on the computer, and a display device and one or more input devices enabling a user to interact with the computer, comprising:

displaying, on a display device of a computer, the display device having a display screen, a diagram of an electronic design, the diagram being at a given hierarchical level of abstraction, the diagram containing at least one object;

storing in the database information relating to the electronic design at various levels of abstraction;

retrieving information relating to the electronic design from a database accessible to the computer;

displaying the information contemporaneously with displaying the diagram;

providing selectable lower level representations of objects represented in the diagram; and

displaying the lower level representations of the objects contemporaneously with displaying the diagram.

2. A method, according to claim 1, further comprising:

and

associating the information with the objects that make up the diagram.

3. A method, according to claim 2, further comprising:

defining locations on the display screen for displaying representations of the objects;

displaying the representations of the objects at the locations;

retrieving selected information associated with the objects that are displayed on the display screen; and

displaying the selected information on the display screen in proximity to the objects.

4. A method, according to claim 2, further comprising:

selecting a displayed object with an input device; and

causing the information associated with the selected object to be displayed in response to selecting the displayed object.

5. A method, according to claim 1, further comprising:

defining a first portion of the information which is available for display and a second portion of the information which requires further design activity in order to be available for display;

displaying on the display screen a list of information in the first portion of the information; and

displaying on the display screen the further design activity required to make the information in the second portion of the information available for display.

6. A method, according to claim 5, further comprising:

adding information from the second portion of the information to the first portion of information upon completion of the required design activity.

7. An ECAD system for designing an electronic design, comprising:

a computer;

design tools running on the computer;

a display device having a screen and one or more input devices enabling a user to interact with the computer;

a graphic user interface operating on the computer for displaying graphics or text on the screen;

means for receiving at least one abstract representation of an electronic design having a plurality of objects, and for providing information relating to the abstract representations to the user interface, wherein at least one abstract representation of the electronic design corresponds to a selected level of abstraction of the design;

a database, accessible to the computer, for storing information corresponding to each object in the electronic design;

means for selecting at least one of the objects and for providing an indication of the selected at least one object to the graphic user interface;

means for retrieving selected information corresponding to the selected at least one of the objects, for providing the selected information to the graphic user interface, and for causing the selected information to be displayed on the screen contemporaneously with displaying the selected at least one object.

8. An ECAD system, according to claim 7, further comprising:

means for associating objects in a hierarchical manner such that;

each object at other than a highest level of abstraction is associated with ancestor objects at higher levels of abstraction; and

each object at other than a lowest level of abstraction is associated with progeny objects at lower levels of abstraction.

9. An ECAD system, according to claim 8, further comprising:

means for displaying the ancestor and progeny objects associated with a selected object in response to the user selecting one of the objects.

10. An ECAD system, according to claim 7, wherein the levels of abstraction comprise:

a system level, an architectural level, a logic level, a gate level, and a transistor level representation of the electronic design.

11. An ECAD system, according to claim 7, further comprising:

means for displaying information corresponding to an object in close proximity to a display of the object on the screen.

12. An ECAD system, according to claim 7, further comprising:

means for displaying a commonality between objects at different levels of abstraction.

13. An interactive schematic design and simulation system comprising:

a computer processor, including means for storing graphical objects;

graphical display means, connected to said computer processor, for displaying the graphical objects;

a portion of the graphical objects are pre-defined graphical objects accessible to said computer processor, each representing a particular schematic symbol, and each having a plurality of input and/or output nodes to which input and/or output signals may be associated;

means for graphically indicating interconnections (nets) between said input and output nodes of said graphical objects on said graphical display means;

means for enabling a problem solving user to manipulate or arrange said pre-defined graphical objects on said graphical display means in the form of a schematic diagram, such that said schematic diagram may be viewed on said graphic display means either in whole or in part;

means for enabling the problem solving user to create, delete or modify said graphical indications of interconnections between said graphical objects;

wherein the computer processor includes a plurality of executable simulation models, the computer processor further including;

means for representing the state of interconnections between said graphical objects in the form of a net-list;

means for representing the state of interconnections between said graphical objects in the form of signal paths between simulation models;

means for specifying a signal state on any input or output node of said graphical objects;

means for specifying a signal state on any of said graphical interconnections (nets) between said input and output nodes of said graphical objects whereby said signal state is simultaneously applied to all input and output nodes connected thereto;

means for specifying an identified portion of said schematic diagram to be simulated;

means for specifying a simulation duration in the form a starting condition, or for specifying starting conditions and a stopping condition, or for specifying stopping conditions;

means for executing a simulation of the identified portion of said schematic diagram according to said starting and stopping conditions; and

means for displaying, on said schematic diagram on said graphical display means, the end states of said simulation such that the state data corresponding to the output nodes of each of said graphical objects is displayed adjacent thereto and for displaying on said graphical display means real-time timing information and net values, and for displaying on said graphical display means the input, output and results of the simulation;

means for organizing design objects associated with said graphical objects in a hierarchical manner such that;

each design object at other than a highest level of abstraction is associated with ancestor design objects at higher levels of abstraction; and

each design object at other than a lowest level of abstraction is associated with progeny design objects at lower levels of abstraction.

14. An interactive schematic design and simulation system comprising:

a computer processor, including means for storing graphical objects;

graphical display means, connected to said computer processor, for displaying the graphical objects;

a plurality of pre-defined graphical objects accessible to said computer processor, each representing a particular schematic symbol, and each having a plurality of input and/or output nodes to which input and/or output signals may be associated;

means for graphically indicating interconnections between said input and output nodes of said graphical objects on said graphical display;

means for representing the interconnections between said input and output nodes of said graphical objects as "nets";

means for enabling the problem solving user to manipulate or arrange said pre-defined graphical objects on said graphical display in the form of a schematic diagram, such that said schematic diagram may be viewed on said graphic display either in whole or in part;

means for enabling the problem solving user to create "new nets" representing additional interconnections between said input and output nodes of said graphical objects;

means for enabling the problem solving user to delete "nets" and "new nets";

means for enabling the problem solving user to modify "nets" and "new nets";

a plurality of executable simulation models accessible to said computer processor;

means for representing, and for displaying on said graphical display device, the current state of interconnections between said graphical objects in the form of a net-list;

means for representing the current state of interconnections between said graphical objects in the form of signal paths between simulation models;

means for specifying a signal state on any input or output node of said graphical objects;

means for specifying a signal state on any of said graphical interconnections (nets) between said input and output nodes of said graphical objects whereby said signal state is simultaneously applied to all input and output nodes connected thereto;

means for specifying a portion of said schematic diagram to be simulated;

means for supplying a test pattern for controlling a simulation;

means for executing a simulation of the identified portion of said schematic diagram according to said starting and stopping conditions; and

means for displaying, on said schematic diagram, the end states of said simulation such that the state data corresponding to the output nodes of each of said graphical objects is displayed adjacent thereto;

further comprising;

means for displaying, on said graphical display device, simulation results in the form of a waveform diagram (timing diagram) such that the waveform pertaining to each of the output nodes of each of said graphical objects is displayed adjacent thereto;

means for organizing design objects associated with said graphical objects in a hierarchical manner such that;

each design object at other than a highest level of abstraction is associated with ancestor design objects at higher levels of abstraction; and

each design object at other than a lowest level of abstraction is associated with progeny design objects at lower levels of abstraction.

15. Method for simultaneous, interactive presentation of electronic circuit diagrams and simulation data, comprising:

in a single computer system, interactively performing all of the following steps;

storing objects representative of circuit elements, a portion of which objects are pre-defined, each object associated with a particular schematic symbol, and each object having a plurality of input and/or output nodes to which input and/or output signals are associated;

displaying the objects on a display;

displaying graphical representations of interconnections between said input and output nodes of said objects on the display;

representing the interconnections between said input and output nodes of said objects as "nets";

storing the nets;

manipulating and arranging said pre-defined objects on said display in the form of a schematic diagram;

creating "new nets" representing additional interconnections between said input and output nodes of said objects;

deleting "nets";

modifying "nets" and representing the modified "nets" as additional "new nets";

displaying and storing the "new nets", deleted "nets" and additional "new nets"

providing a plurality of executable simulation models for operating on the interconnected objects;

storing states of the nets in the form of a net-list;

specifying, storing and displaying a signal state on any input or output node of said objects;

specifying a signal state on any of said nets;

applying said signal state simultaneously to all input and output nodes connected to a net;

specifying a portion of said schematic diagram to be simulated;

specifying a duration for said simulation in the form of starting conditions and/or stopping conditions;

executing a simulation of the identified portion of said schematic diagram according to said starting and stopping conditions; and

displaying, on said schematic diagram, the end states of said simulation such that the state data corresponding to the output nodes of each of said graphical objects is displayed immediately adjacent thereto during simulation;

associating the objects in a hierarchical manner such that;

each object at other than a highest level of abstraction is associated with ancestor objects at higher levels of abstraction; and

each object at other than a lowest level of abstraction is associated with progeny objects at lower levels of abstraction.

16. In an ECAD system, a method of creating and validating a structural description of an electronic system from a higher level, behavior-oriented description thereof, comprising:

entering on an ECAD system a specification for a design of desired behavior of an electronic system, including high-level timing goals, in a high-level, behavior-oriented language;

on the ECAD system, iteratively simulating and changing the design of the electronic system at the behavioral-level until the desired behavior is obtained;

on the ECAD system, displaying the design of at least a portion the electronic system as a plurality of graphical objects forming a schematic diagram and simultaneously displaying simulation data on the schematic diagram adjacent to graphical objects to which the simulation data applies;

on the ECAD system, partitioning the design of the device into a number of architectural blocks and constraining the architectural choices to those which meet the high-level timing goals;

on the ECAD system, directing the various architectural blocks to logic synthesis programs, said logic synthesis programs also running in the ECAD system, thereby providing a netlist or gate-level description of the design; and

organizing design objects associated with said graphical objects in a hierarchical manner such that;

each design object at other than a highest level of abstraction is associated with ancestor design objects at higher levels of abstraction; and

each design object at other than a lowest level of abstraction is associated with progeny design objects at lower levels of abstraction.

17. In an ECAD system, a method of deriving a structural description of an electronic system from a behavioral description thereof, comprising:

(a) specifying a behavioral design for an electronic system in a high-level, behavior-oriented language;

(b) describing, in the high-level language, a functional description of the design of the electronic system, and inputting the functional description to the ECAD system;

(c) verifying in the high-level language, correctness of intended functionality and, if necessary, iteratively simulating and changing the functional description of the electronic system until the desired functionality is obtained;

(d) on the ECAD system, partitioning the functional description into a number of architectural blocks;

(e) on the ECAD system, constraining the architectural choices for the design to those which meet the desired behavior;

(f) on the ECAD system, mapping the architecturally constrained design into a structural description of the electronic system;

(g) on the ECAD system, displaying the at least a portion of the design as a plurality of interconnected graphical objects forming a schematic diagram and simultaneously displaying simulation data on the schematic diagram adjacent to graphical objects to which the simulation data applies; and

(h) organizing design objects associated with said graphical objects in a hierarchical manner such that;

each design object at other than a highest level of abstraction is associated with ancestor design objects at higher levels of abstraction; and

each design object at other than a lowest level of abstraction is associated with progeny design objects at lower levels of abstraction.