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Transformation pattern generating device and encryption function device

  • US 5,623,548 A
  • Filed: 01/10/1995
  • Issued: 04/22/1997
  • Est. Priority Date: 01/10/1994
  • Status: Expired due to Term
First Claim
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1. An encryption function device, comprising:

  • key input means for inputting a key for encryption;

    transformation pattern generating means for using the key as a key number sequence and for generating a transformation pattern using at least one of the key number sequence and a pseudo-random number sequence generated by a random number generator using the key number sequence as a seed; and

    transformation means for transforming data in accordance with the transformation pattern generated by said transformation pattern generating means,wherein the transformation pattern includes m substitution tables and a permutation circuit having m input terminals and m output terminals,wherein said transformation means includes;

    m input switches, where m is an even number;

    m output destination switches;

    m exclusive-OR circuits; and

    a bit rotate shift mechanism having m input terminals and m output terminals; and

    wherein a j-th input switch in one switching state outputs a j-th mini-block which is one of m mini-blocks into which input data is divided, and the j-th input switch in another switching state outputs a mini-block sent from a j-th output destination switch;

    the j-th output destination switch in one switching state outputs the j-th mini-block of the bit rotate shift means, and the j-th output destination switch in another switching state outputs the j-th mini-block of the bit rotate shift means to the j-th input switch;

    an output of a k-th input switch is input to an address of a k-th substitution table, where k is between 1 and m/2;

    an output of the k-th substitution table and an output of an (i+k-1)-th substitution table are input to a k-th exclusive-OR-circuit;

    an output of an (i+k-1)-th exclusive-OR circuit is input to an address of the (i+k-1)-th substitution table;

    an output of an (i+k-1)-th input switch and the output of the k-th substitution table are input to the (i+k-1)-th exclusive-OR circuit;

    an output of the k-th exclusive-OR circuit is input to a k-th input terminal of the permutation circuit;

    the output of the (i+k-1)-th substitution table is applied to an (i+k-1)-th input terminal of the permutation circuit;

    a j-th output of the permutation circuit is input to a j-th input terminal of the bit rotation shift means; and

    the bit rotate shift means rotatively shifts entire data input to first to m-th input terminals.

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