Charge pump
First Claim
1. A charge pump circuit comprising:
- a clock control circuit for providing a clock signal and an inverted clock signal, said inverted clock signal being approximately 180 degrees out-of-phase with respect to said clock signal;
a plurality of diode-capacitor voltage multipliers connected in a chain, wherein alternate ones of said voltage multipliers are coupled to said respective clock and inverted clock signals; and
an output stage for providing to an output terminal of said charge pump circuit current during both low and high transitions of said clock signal.
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Accused Products
Abstract
A charge pump circuit including N stages of diode-capacitor voltage multipliers clocked so as to convert a low voltage received from a supply voltage to a high voltage at an output terminal thereof employs an output stage to improve the efficiency of the charge pump. The output stage includes first and second legs each coupled to the output terminal, where the first leg provides current to the output terminal during low transitions of the clock signal and the second stage provides current to the output terminal during high transitions of the clock signal. In some embodiments, the numerous one of the above-mentioned charge pump circuit may be connected in parallel to achieve even greater output currents. Thus, unlike conventional charge pump circuits, a substantially constant current is provided to the output terminal throughout the period of the clock signal, thereby increasing the average total current provided to the output terminal and, thus, increasing the driving capability of the charge pump circuit.
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Citations
20 Claims
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1. A charge pump circuit comprising:
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a clock control circuit for providing a clock signal and an inverted clock signal, said inverted clock signal being approximately 180 degrees out-of-phase with respect to said clock signal; a plurality of diode-capacitor voltage multipliers connected in a chain, wherein alternate ones of said voltage multipliers are coupled to said respective clock and inverted clock signals; and an output stage for providing to an output terminal of said charge pump circuit current during both low and high transitions of said clock signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A charge pump circuit comprising:
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a clock control circuit for providing a plurality of clock signals and a plurality of associated inverted clock signals, wherein each of said inverted clock signals is approximately 180 degrees out-of-phase with respect to its associated clock signal; a plurality voltage multiplier circuits, said voltage multiplier circuits each comprising a plurality of series connected diode-capacitor voltage multipliers, wherein the capacitors of each of said plurality of voltage multiplier circuits are alternately coupled to a selected one of said plurality of said clock signals and to an inverted clock signal associated with said selected one of said clock signals; and a plurality of output stages for providing to an output terminal of said charge pump circuit substantially equal current during low and high transitions of said clock signals. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification