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Hardware modeling system and method of use

  • US 5,625,580 A
  • Filed: 09/26/1994
  • Issued: 04/29/1997
  • Est. Priority Date: 05/31/1989
  • Status: Expired due to Term
First Claim
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1. A hardware modeling system adapted for coupling to one of a predetermined collection of host computers, the hardware modeling system for evaluating a response of an electronic device or circuitry to stimulation from the hardware modeling system, with pins of the electronic device or circuitry being electrically coupled to pin drivers of the hardware modeling system, comprising:

  • a. a host connection means configured for coupling a host computer for transmitting bi-directionally thereon communications between the hardware modeling system and a host computer;

    b. microprocessor means coupled to the host connection means for controlling programmed operation of the hardware modeling system;

    c. central timing control means for generating timing signals for controlling timing of operations of the hardware modeling system, the central timing control means coupled to the microprocessor means and a pattern bus means for generating sample strobes for sampling outputs of the pins of the electronic device or circuitry and edge strobes for formatting stimulation patterns;

    d. pattern bus means coupled to the central timing control means and the microprocessor, the pattern bus means having a first mode of operation for the microprocessor means to access certain circuitry for conducting read and write operations and a second mode of operation for presenting the stimulation patterns to the pins of the electronic device or circuitry which is electrically coupled to the hardware modeling system;

    e. pattern controller means coupled to the pattern bus means for controlling stimulation pattern sequencing and delivery of stimulation patterns to the pattern bus;

    f. pattern memory means coupled to the pattern controller means for storing the stimulation patterns in the pattern memory means in a plurality of memory means bits;

    g. pin electronics circuitry coupled to the pattern bus means for driving and sensing the pins of the electronic device or circuitry, and the pin electronics circuitry providing sensing of at least four states of the pins of electronic device or circuitry; and

    h. adaptor means coupled to the pin electronics circuitry and the pins of the electronic device or circuitry, the adaptor means configured for electrically receiving the electronic device or circuitry wherein the adaptor means includes circuitry for supporting live-insertion into a powered hardware modeling system.

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