Programmable external storage control apparatus

• US 5,625,840 A
• Filed: 04/13/1995
• Issued: 04/29/1997
• Est. Priority Date: 11/18/1992
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Shimizu, Kenji, Sakai, Tatsuya, Kigami, Yuji, Numata, Tsutomu
• Primary Examiner(s): Heckler, Thomas M.
• Application Number:
  US08/421,713
• Time in Patent Office: 747 Days
• Field of Search: 395/650, 395/825, 395/821, 395/843, 395/853, 395/872
• US Class Current: 710/5
• CPC Class Codes: G06F 13/124 where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 9/445 Program loading or initiating bootstrapping G06F9/4401; security arrangements for program loading or initiating G06F21/57

Abstract

A programmable external storage control apparatus, including a buffer for temporarily storing data to be transferred between a host and an external storage, which stores a program for controlling data transfer between the host and the external storage and controls the data transfer between the host and the external storage by reading the data transfer control program from the buffer and executing it. The apparatus further includes a microprocessor that responds to a command from the host by starting the control of the data transfer by reading the data transfer control program. The microprocessor includes a memory for storing the data transfer control program in addition to other programs to be executed by the microprocessor. The microprocessor loads the data transfer control program from the memory into the buffer at the time of initialization. This allows the microprocessor to do other jobs such as servo control while the data transfer control program is executed.

Claims

1. A programmable external storage control apparatus for controlling an external storage in response to a command from a host, comprising:

a buffer temporarily storing data to be transferred between said host and said external storage and further storing a program for controlling data transfer between said host, said buffer, and said external storage;

control means for controlling said data transfer by reading from said buffer and executing said program, which controls said data transfer between said host, said buffer, and said external storage; and

a microprocessor starting said control means in reading said program in response to said command from said host.

2. The programmable external storage control apparatus of claim 1, wherein said microprocessor has a memory where said program is stored, and said microprocessor loads said program from said memory into said buffer at initialization time.

3. The programmable external storage control apparatus of claim 2, wherein said buffer is partitioned into data storage and program storage areas and said microprocessor loads said program from said memory into said program storage area by specifying a start address of said program storage area at said initialization time.

4. The programmable external storage control apparatus of claim 1, wherein said control means further comprises:

host interface means for exchanging data and commands with said host;

external storage interface means for exchanging data with said external storage;

sequencer means for executing said program; and

memory control means connecting said host interface means, said external storage interface means, and said sequencer means to said buffer for controlling transfer between them and said buffer.

5. The programmable external storage control apparatus of claim 4, wherein said microprocessor starts said memory control means in response to a command from said host and starts transfer between said buffer and said host interface means, said external storage interface means, and said sequencer means in a time sharing mode.

6. The programmable external storage control apparatus of claim 5, wherein said memory control means performs transfer between said buffer and said host interface means, said external storage interface means, and said sequencer means through respective first-in first-out buffers.

7. The programmable external storage control apparatus of claim 4, wherein said sequencer means further comprises:

a decoder for decoding program instructions read from said buffer;

arithmetic means and address generating means controlled by signals from said decoder; and

register selecting means for selecting a register in said control means based on an address from said address generating means.

8. An external storage system in which data is read or written by a command from a host, comprising:

an external storage for storing said data;

a buffer that temporarily stores data to be transferred between said host and said external storage and further stores a program for controlling data transfer between said host, said buffer, and said external storage;

control means for controlling said data transfer by reading from said buffer and executing said program, which controls said data transfer between said host, said buffer, and said external storage; and

a microprocessor for starting said control means in reading said program in response to said command from said host.

9. The external storage system of claim 8, wherein said microprocessor has a memory where said program is stored, and said microprocessor loads said program from said memory into said buffer at initialization time.

10. The external storage system of claim 9, wherein said buffer is partitioned into data storage and program storage areas and said microprocessor loads said program from said memory into said program storage area by specifying a start address of said program storage area at said initialization time.

11. The external storage system of claim 8, wherein said control means further comprises:

host interface means for exchanging data and commands with said host;

external storage interface means for exchanging data With said external storage;

sequencer means for executing said program; and

memory control means connecting said host interface means, said external storage interface means, and said sequencer means to said buffer for controlling transfer between them and said buffer.

12. The external storage system of claim 11, wherein said microprocessor starts said memory control means in response to said command from said host and starts transfer between said buffer and said host interface means, said external storage interface means, and said sequencer means in a time sharing mode.

13. The external storage system of claim 12, wherein said memory control means performs said transfer between said buffer and said host interface means, said external storage interface means, and said sequencer means through respective first-in first-out buffers.

14. The external storage system of claim 11, wherein said sequencer means further comprises:

a decoder for decoding program instructions read from said buffer;

arithmetic means and address generating means controlled by signals from said decoder; and

register selecting means for selecting a register in said control means based on an address from said address generating means.

15. A method for controlling an external storage in response to a command from a host, comprising the machine executed steps of:

a microprocessor loading a program into a buffer for controlling data transfer between said host, said buffer, and said external storage;

controlling said data transfer by reading from said buffer and executing said program independent from said microprocessor; and

starting of said controlling step by said microprocessor in response to said command from said host.

16. The method of claim 15, wherein said loading step further comprises said microprocessor loading said program from memory of said microprocessor into said buffer at initialization time.

17. The method of claim 16, wherein said loading step further comprises said microprocessor loading said program from said memory into a program storage area wherein said buffer is partitioned into a data storage area and said program storage area.

18. The method of claim 15, wherein said controlling step further comprises:

exchanging data and commands with said host;

exchanging data with said external storage; and

executing said program by a sequencer.

19. The method of claim 18, wherein said executing step further comprises:

decoding program instructions read from said buffer.