Hall-effect sensor incorporated in a CMOS integrated circuit
First Claim
1. In a combination of a CMOS integrated circuit and a Hall-effect sensor incorporated in the CMOS integrated circuit, a substrate of a first electrical conductivity type, a well of a second electrical conductivity type formed on one surface of said substrate, first and second heavily doped regions in the well and separated from each other on a first axis and having the second electrical conductivity type, third and fourth heavily doped regions in the well and separated from each other on a second axis and having the second electrical conductivity type, said second axis being perpendicular to said first axis, first and second metal electric supply contacts of the Hall-effect sensor over said first and second heavily doped regions, respectively, and first and second metal electric pick-up contacts of the Hall-effect sensor over said third and fourth heavily doped regions, respectively, said first metal electric pick-up contact of the Hall-effect sensor being connected to a virtual ground of the Hall-effect sensor supplying circuit, the improvement comprising:
- a field oxide layer having a thickness approximately between 0.8 μ
m and 1.0 μ
m on an upper plane of the substrate and overlying said well of the second electrical conductivity type everywhere except in locations over said electric supply contacts and said electric pick-up contacts; and
a layer of conductive polysilicon formed over the field oxide layer and connected to a ground of the integrated circuit.
0 Assignments
0 Petitions
Accused Products
Abstract
The Hall-effect sensor HS'"'"' of the invention incorporated in a CMOS integrated circuit IC'"'"' is formed with a well 2'"'"' as the sensor active layer on a substrate 1'"'"'. Heavily doped regions 31'"'"', . . . , 34'"'"', in the well 2'"'"' are connected with sensor metal contacts 41'"'"', . . . , 44'"'"'. The upper plane S'"'"' of the substrate 1'"'"' is covered by a field oxide layer 5'"'"' the thickness thereof being between 0.8 μm. and 1.0 μm. Over the layer 5'"'"' in the region 50'"'"' surrounding the sensor contacts 41'"'"', . . . , 44'"'"', a polysilicon layer 6'"'"' is provided to block the disturbing influence of ions migrating in the field oxide layer 5'"'"'.
24 Citations
1 Claim
-
1. In a combination of a CMOS integrated circuit and a Hall-effect sensor incorporated in the CMOS integrated circuit, a substrate of a first electrical conductivity type, a well of a second electrical conductivity type formed on one surface of said substrate, first and second heavily doped regions in the well and separated from each other on a first axis and having the second electrical conductivity type, third and fourth heavily doped regions in the well and separated from each other on a second axis and having the second electrical conductivity type, said second axis being perpendicular to said first axis, first and second metal electric supply contacts of the Hall-effect sensor over said first and second heavily doped regions, respectively, and first and second metal electric pick-up contacts of the Hall-effect sensor over said third and fourth heavily doped regions, respectively, said first metal electric pick-up contact of the Hall-effect sensor being connected to a virtual ground of the Hall-effect sensor supplying circuit, the improvement comprising:
-
a field oxide layer having a thickness approximately between 0.8 μ
m and 1.0 μ
m on an upper plane of the substrate and overlying said well of the second electrical conductivity type everywhere except in locations over said electric supply contacts and said electric pick-up contacts; anda layer of conductive polysilicon formed over the field oxide layer and connected to a ground of the integrated circuit.
-
Specification