Inverted chip bonded module with high packaging efficiency

• US 5,627,406 A
• Filed: 08/12/1996
• Issued: 05/06/1997
• Est. Priority Date: 12/22/1994
• Status: Expired due to Term

• Current Assignee: Network Protection Sciences, LLC (Innovation Management Sciences, LLC)
• Original Assignee: Benedict G. Pace
• Inventors: Pace, Benedict G.
• Primary Examiner(s): Jackson, Jr., Jerome
• Assistant Examiner(s): Wallace, Valencia Martin
• Application Number:
  US08/689,388
• Time in Patent Office: 267 Days
• Field of Search: 257/347, 257/700, 257/698, 257/74, 257/690, 257/703
• US Class Current: 257/700
• CPC Class Codes: H01L 21/485 Adaptation of interconnections, e.g. engineering charges, repair techniques
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 2224/1147 using a lift-off mask
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 23/053 the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
• CPC Class Codes: H01L 23/147 Semiconductor insulating substrates semiconductor conductive substrates H01L23/4926
• CPC Class Codes: H01L 23/15 Ceramic or glass substrates H01L23/142, H01L23/145, H01L23/147 take precedence
• CPC Class Codes: H01L 23/34 Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements thermal treatment apparatus H01L21/00
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/49811 Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/49866 characterised by the materials materials of the substrates H01L23/14, of the lead-frames H01L23/49579
• CPC Class Codes: H01L 23/5382 Adaptable interconnections, e.g. for engineering changes
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01021 : Scandium [Sc]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01057 : Lanthanum [La]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H05K 1/0306 : Inorganic insulating substrates, e.g. ceramic, glass
• CPC Class Codes: H05K 2201/0347 : Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias reinforcing the conductive pattern H05K3/24
• CPC Class Codes: H05K 2201/0367 : Metallic bump or raised conductor not used as solder bump solder materials or compositions and methods of application thereof H05K3/3457
• CPC Class Codes: H05K 3/4007 : Surface contacts, e.g. bumps H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3457
• CPC Class Codes: H05K 3/4644 : by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602

Abstract

An electronic packaging module for inverted bonding of semiconductor devices, integrated circuits, and/or application specific integrated circuits is produced with protuberances on the conductive pattern of the substrate. The protuberances are of a soft, ductile metal capable of being metallurgically bonded to the input/output pads of semiconductor devices. The input/output pads of the semiconductor devices are simultaneously bonded to the protuberances of the packaging module.

Claims

1. An electronic module for packaging at least one semiconductor device comprising:

a rigid, planar, inorganic, insulating substrate;

the substrate having thereon a metallic, conductive pattern of one or more conductive pattern layers;

the substrate having metal contacts, the contacts being connected to the conductive pattern, and being capable of making electrical connection to another electronic package or a higher level of electronic packaging;

the conductive pattern layer(s) being separated by insulating layer(s);

the conductive pattern layers being interconnected by metal filled vias in the insulating layers;

an outermost, conductive pattern layer having metal protuberances less than 150 μ

m (6 mils) in diameter protruding 5-80 μ

m (0.2-3 mils) above the surface of the outermost layer, and the metal protuberances being a soft, ductile metal capable of being metallurgically bonded to input/output pads of the semiconductor device(s), and

the metal protuberances being capable of providing input/output connections for the semiconductor devices through the connections to the conductive pattern of the electronic packaging module and through the metal contacts to another electronic package or electronic assembly.

2. An electronic module according to claim 1 wherein the inorganic substrate is selected from the group consisting of silicon, sapphire and ceramics and glass/ceramics comprising aluminum oxide, aluminum nitride, beryllium oxide, boron nitride, cordierite, mullite, silicon carbide and silicon nitride.

3. An electronic module according to claim 2, further comprising an insulating layer coating the outermost, conductive pattern layer, and the protuberances rising 5-80 μ

m (0.2-3 mils) above the surface of the insulating layer.

4. An electronic module according to claim 3, wherein the insulating layer(s) are thick film dielectric layers.

5. An electronic module according to claim 1, wherein the conductive pattern comprises a plurality of conductive pattern layers.

6. An electronic module according to claim 1, wherein the metal of the metal protuberances is selected from the group comprising aluminum, gold, indium, lead, silver, tin and alloys of these metals.

7. An electronic module according to claim 6, wherein the metal of the metal protuberances is gold.

8. An electronic module according to claim 1, wherein the metal contacts being capable of being connected to the conductive pattern, and being capable of making electrical connection to another electronic package or a higher level of electronic packaging are flat pack contacts.

9. An electronic module according to claim 1, wherein the metal contacts are on the surface of the planar, inorganic substrate opposite to the surface having the conductive pattern, and the substrate is provided with electrically conductive feed-throughs connecting the conductive pattern layers to metal contacts on the opposite surface, and the metal contacts are selected from the group consisting of flat packs and area arrays.

10. An electronic module according to claim 9, wherein the area array is selected from the group consisting of ball grid arrays, column grid arrays, land grid arrays and pin grid arrays.

11. An electronic module according to claim 1, further comprising at least one semiconductor device, the input/output pad areas of the device(s) being bonded to the protuberances, and the protuberances providing direct electrical contact from the semiconductor device(s) to the conductive pattern and the metal contacts of the substrate.

12. An electronic module according to claim 11, wherein the input/output pads of the semiconductor device(s) are on the perimeter of the device(s), and the substrate is provided with electrically conductive feed-throughs from the conductive pattern layers to metal contacts of an area array, the conductive pattern connecting the input/output pads through the feed-throughs to a area array of metal contacts underneath the semiconductor device(s).

13. An electronic module according to claim 11, wherein the module has high packaging efficiency, the module containing a single semiconductor device, the device being sealed in a metal, ceramic or plastic enclosure, and length and breadth of the module is less than 6 mm (150 mils) greater than the length and breath of the device.

14. An electronic module according to claim 13, wherein the length and breath of the module is less than 3 mm (75 mils) greater than the length and breadth of the device.

15. An electronic module according to claim 14, wherein the length and breath of the module is less than 1.6 mm (40 mils) greater than the length and breadth of the device.

16. An electronic module according to claim 11, wherein the module contains a single device, and the length and breadth of the module is less than 0.25 mm (10 mils) greater than the length and breath of the device.

17. An electronic module according to claim 1, wherein the semiconductor devices are a plurality of individual devices contained on one die, and the metal protuberances being capable of providing input/output connections between semiconductor devices on the die through the conductive pattern of the module, and from the semiconductor devices through the conductive pattern of the electronic packaging module and through the metal contacts to another electronic package or electronic assembly.

18. In a circuit module suitable for use as a first level package for at least one semiconductor device, the module having a planar, insulating, ceramic substrate that has a metallic, conductive pattern of one or more conductive pattern layers;

the conductive pattern comprising thick or thin film metal layers separated by insulating layer(s);

the conductive pattern layers being interconnected by metal filled vias in the insulating layers, and the substrate having metal contacts, the contacts being connected to the conductive pattern, and being capable of making electrical connection to another electronic package or a higher level of electronic packaging, the improvement comprising;

an outermost, conductive pattern layer having metal protuberances less than 150 μ

m (6 mils) in diameter protruding 5-80 μ

m (0.2-3 mils) above the surface of the layer, and the metal protuberances being a soft, ductile metal capable of being metallurgically bonded to the input/output pads of a semiconductor device, and

the metal protuberances being capable of metallurgically bonding to the input/output pads of a semiconductor device and connecting the input/output pads of the semiconductor device to the conductive pattern of the electronic packaging module and through the metal contacts to another module or the next level electronic package.

19. A circuit module according to claim 18, wherein the metal of the metal protuberances is selected from the group comprising aluminum, gold, indium, lead, silver, tin and alloys of these metals.

20. A circuit module according to claim 19, wherein the metal of the metal protuberances is gold.

21. A circuit module according to claim 19, further comprising an insulating layer coating the outermost, conductive pattern layer, and the protuberances rising 5-80 μ

m (0.2-3 mils) above the surface of the insulating layer.

22. A circuit module according to claim 19, further comprising at least one semiconductor device, the device having input/output pad areas bonded to the protuberances, the protuberances providing direct electrical contact from the semiconductor device(s) to the conductive pattern and the metal contacts of the substrate.

23. A circuit module according to claim 22, wherein input/output pads of the semiconductor device(s) are on the perimeter of the device(s).

24. A circuit module according to claim 23, further comprising the conductive pattern and the semiconductor device being encapsulated by a plastic composition.

25. A circuit module according to claim 23, further comprising a frame enclosing the conductive pattern and the semiconductor device(s), the frame being bonded to the substrate.

26. An electronic package according to claim 25, further comprising a metal plug, the metal plug being placed against the base of the integrated circuit, the metal plug being metallurgically bonded to the frame, and being capable of conducting heat away from the integrated circuit.