DC/DC converter having a bootstrapped high side driver

• US 5,627,460 A
• Filed: 12/28/1994
• Issued: 05/06/1997
• Est. Priority Date: 12/28/1994
• Status: Expired due to Term

• Current Assignee: Unitrode Corp. (Texas Instruments, Inc.)
• Original Assignee: Unitrode Corp. (Texas Instruments, Inc.)
• Inventors: O'Connor, John A., Bazinet, John P.
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): Riley, Shawn
• Application Number:
  US08/365,349
• Time in Patent Office: 860 Days
• Field of Search: 323/223, 323/225, 323/283-288, 323/266, 327/108
• US Class Current: 323/288
• CPC Class Codes: G05F 1/618 using semiconductor devices in series and in parallel with the load as final control devices G05F1/461 takes precedence
• CPC Class Codes: H02M 1/0006 Arrangements for supplying an adequate voltage to the control circuit of converters
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: H02M 3/33561 having more than one ouput with independent control
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A synchronous step-down DC to DC converter includes a bootstrap capacitor monitored by a controller for maintaining a desired bootstrap voltage to drive a high side NMOS switch. The controller temporarily increases the duty cycle of the low side NMOS switch when the bootstrap voltage decreases below a predetermined level to maintain a minimum level of charge on the bootstrap capacitor.

Claims

1. A step-down converter for converting an input voltage to a lower output voltage, said converter comprising:

a pair of NMOS switches coupled in series, a first one of said switches being coupled to said input voltage and a second one of said switches being coupled to ground;

an output filter coupled to said pair of switches, said output filter providing an output terminal at which said output voltage is provided;

a bootstrap capacitor charged by said input voltage through a path including said second switch and having a bootstrap voltage thereacross; and

a control circuit receiving a signal indicative of said output voltage and providing gate drive signals to each of said pair of switches to control the duty cycles of said switches so as to maintain said output voltage substantially constant, said control circuit including a sensor for sensing said bootstrap voltage and increasing the duty cycle of said second switch in response to said bootstrap voltage being below a first predetermined level and said first switch being closed.

2. The step-down converter recited in claim 1 wherein said sensor of said control circuit additionally decreases the duty cycle of said first switch when said duty cycle of said second switch is increased.

3. The step-down converter recited in claim 1 wherein said control circuit comprises:

a PWM circuit comparing said signal indicative of said output voltage to a ramp voltage and providing a PWM command signal in response to said comparison, said PWM command signal being indicative of said duty cycles of said pair of switches;

a gate drive circuit responsive to said PWM command signal and said bootstrap voltage for providing said gate drive signals to each of said pair of switches; and

a bootstrap controller for sensing said bootstrap voltage and providing a PWM override signal to said PWM circuit, said PWM override signal causing said duty cycle of said second switch to be increased.

4. The step-down converter recited in claim 3 wherein said bootstrap controller comprises a latch for providing said PWM override signal when said bootstrap voltage is below said first predetermined level and said PWM command signal is at a level corresponding to approximately 100% duty cycle of said first switch and said first switch is closed.

5. The step-down converter recited in claim 1 wherein said first predetermined level of said bootstrap voltage is greater than said input voltage.

6. The step-down converter recited in claim 4 wherein said latch is reset when said bootstrap voltage is greater than a second predetermined level, greater than said first predetermined level, and said first switch is closed.

7. The step-down converter recited in claim 1 further comprising a linear regulator powered by said input voltage, said linear regulator providing a regulated voltage for charging said bootstrap capacitor.

8. A step-down converter for converting an input voltage to a lower output voltage, said converter comprising:

a pair of NMOS switches coupled in series, a first one of said pair of switches having a drain terminal coupled to said input voltage, a gate terminal, and a source terminal and a second one of said pair of switches having a source terminal coupled to ground, a drain terminal coupled to the source terminal of the said first switch, and a gate terminal, said pair of switches having complementary duty cycles;

an inductor having a first terminal coupled to the source terminal of the first switch and the drain terminal of said second switch and a second terminal providing an output terminal of the converter at which said output voltage is provided;

a capacitor having a first terminal coupled to said output terminal of said converter and a second terminal coupled to ground;

a gate drive circuit for providing a gate drive signal to each of said pair of switches to control said duty cycles of said pair of switches;

a bootstrap capacitor charged by a regulated voltage and coupled to said source terminal of said first switch, said bootstrap capacitor having a bootstrap voltage thereacross, said bootstrap voltage being greater than said input voltage and being provided to said gate drive circuit enabling said gate drive circuit to provide a gate drive signal to said first switch having a voltage greater than said input voltage;

a PWM circuit coupled between said output terminal and said gate drive circuit, said PWM circuit providing a PWM command signal to said gate drive circuit to control said duty cycles of said pair of switches; and

a bootstrap controller for monitoring said bootstrap voltage, said controller providing a control signal to said PWM circuit for adjusting said PWM command signal so as to increase the duty cycle of said second switch in response to said bootstrap voltage being below a predetermined level and said first switch being closed.

9. The step-down converter recited in claim 8 wherein said bootstrap controller comprises a latch for providing said PWM override signal when said bootstrap voltage is below said predetermined level and said PWM command signal is at a level corresponding to approximately 100% duty cycle of said first switch and said first switch is closed.

10. The step-down converter recited in claim 8 wherein said predetermined level of said bootstrap voltage is greater than said input voltage.

11. The step-down converter recited in claim 9 wherein said latch is reset when said bootstrap voltage is greater than a second predetermined level and said first switch is closed.

12. A method for driving a high side switch of a synchronous Buck converter comprising said high side switch coupled to an input voltage and a low side switch coupled between said high side switch and ground, said high side switch and said low side switch being NMOS devices, comprising the steps of:

coupling a bootstrap capacitor between a regulated voltage and a source terminal of said high side switch, said source terminal being further coupled to a drain terminal of said low side switch;

charging said bootstrap capacitor through said low side switch when said low side switch is closed to provide a bootstrap voltage across said bootstrap capacitor;

driving said high side switch with a gate drive signal having a voltage level corresponding to said bootstrap voltage;

sensing said bootstrap voltage; and

increasing the duty cycle of said low side switch in response to said bootstrap voltage being below a predetermined level and said high side switch being closed.

13. The method recited in claim 12 wherein said duty cycle increasing step comprises the steps of:

sensing when the duty cycle commanded of said high side switch is approximately 100%;

sensing when said high side switch is closed; and

increasing said duty cycle of said low side switch when the duty cycle associated with said high side switch is approximately 100%, said high side switch is closed, and said bootstrap voltage is less than said predetermined level.

14. The method recited in claim 12 further comprising the step of ceasing to increase the duty cycle of said low side switch when said bootstrap voltage is greater than or equal to a second predetermined level and said high side switch is closed.