Watchdog circuit employing minimum and maximum interval detectors
First Claim
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1. A watchdog circuit, comprising:
- a minimum interval detector connected to receive a watchdog input signal from a monitored circuit and to determine whether intervals between assertions of the input signal are at least a minimum specified interval and to provide an indication of whether the intervals are the specified minimum,a maximum interval detector connected to receive a watchdog input signal from a monitored circuit and to determine whether intervals between asssertions of the input signal are less than a maximum specified interval and to provide an indication of whether the intervals are the specified maximum, andcombining circuitry connected to said minimum and maximum interval detectors to combine said indications to produce watchdog alarm output signal.
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Abstract
A watchdog circuit accepts an output signal from a monitored circuit such as a microprocessor to determine whether the monitored circuit is operating appropriately or has incurred an error. The monitored circuit must periodically assert the output signal to prevent the watchdog circuit, which imposes both upper and lower frequency bounds on the assertion of this signal, from "timing out" and setting a watchdog error alarm. The watchdog circuit may be combined with other circuits, such as power on reset, battery back-up switching, etc., within a microprocessor supervisory circuit.
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Citations
20 Claims
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1. A watchdog circuit, comprising:
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a minimum interval detector connected to receive a watchdog input signal from a monitored circuit and to determine whether intervals between assertions of the input signal are at least a minimum specified interval and to provide an indication of whether the intervals are the specified minimum, a maximum interval detector connected to receive a watchdog input signal from a monitored circuit and to determine whether intervals between asssertions of the input signal are less than a maximum specified interval and to provide an indication of whether the intervals are the specified maximum, and combining circuitry connected to said minimum and maximum interval detectors to combine said indications to produce watchdog alarm output signal. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A watchdog circuit, comprising:
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a minimum interval detector connected to receive a watchdog input signal from a monitored circuit, a maximum interval detector connected to receive a watchdog input signal from a monitored circuit, and an alarm output, said minimum interval detector and maximum interval detector connected to assert said alarm output whenever the interval between assertions of the watchdog input signal is less than a prescribed minimum interval and the interval between assertions of the watchdog input is greater than a prescribed maximum interval.
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8. A watchdog circuit, comprising:
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a minimum interval detector connected to receive a watchdog input signal from a monitored circuit and to block assertions of that signal whenever the interval between assertions of that signal is less than a prescribed minimum interval, and to pass those assertions whenever the interval between assertions of that signal is greater than or equal to the prescribed minimum interval, and a maximum interval detector which includes an alarm output, connected to receive assertions of said watchdog input signal from said minimum interval detector, said maximum interval detector connected to assert said alarm output whenever the interval between assertions of the signal from the minimum interval detector exceeds a prescribed maximum interval. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A supervisory circuit, comprising:
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a watchdog circuit including a minimum interval detector having an input, said input connected to receive a watchdog input signal from a monitored circuit and to block assertions of that signal whenever the interval between assertions of that signal is less than a prescribed minimum interval and to pass those assertions whenever the interval between assertions of that signal is greater than or equal to the prescribed minimum interval, a maximum interval detector which includes an alarm output, connected to receive said signal from said minimum interval detector, said maximum interval detector connected to assert said alarm output whenever the interval between assertions of the signal from the minimum interval detector exceeds a prescribed maximum interval, a clock circuit connected to provide clock pulses to said minimum and maximum interval detectors, and a reset/switch controller circuit connected to receive said watchdog output signal and to provide a reset output signal. - View Dependent Claims (15, 16)
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17. A microprocessor based system, comprising:
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a microprocessor, a supervisory circuit connected to receive a watchdog input signal from said microprocessor and to provide a watchdog alarm signal output, said supervisory circuit comprising a watchdog circuit including a minimum interval detector having an input, said input connected to receive a watchdog input signal from a monitored circuit and to block assertions of that signal whenever the interval between assertions of that signal is less than a prescribed minimum interval and to pass those assertions whenever the interval between assertions of that signal is greater than or equal to the prescribed minimum interval, and a maximum interval detector which includes an alarm output, connected to receive said signal from said minimum interval detector, said maximum interval detector connected to assert said alarm output whenever the interval between assertions of the signal from the minimum interval detector exceeds a prescribed maximum interval. - View Dependent Claims (18)
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19. A method for producing a watchdog alarm signal, comprising the steps of:
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testing a watchdog input signal to determine whether assertions of it meet a minimum interval requirement, testing a watchdog input signal to determine whether assertions of it meet a maximum interval requirement, activating an alarm if the watchdog input interval violates either interval requirement.
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20. A method for producing a watchdog alarm signal, comprising the steps of:
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testing a watchdog input signal to determine whether it meets a minimum interval requirement, passing only those assertions of the watchdog input signal to a maximum interval detector which meet the minimum interval requirement, activating an alarm if the assertions passed by the minimum interval detector fail to meet a maximum interval requirement.
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Specification