Coded domain picture composition for multimedia communications systems
First Claim
1. A compressed domain video composition system for integrating up to four coded video input bit streams into a composite video output bit stream in a compressed domain, the system comprising:
- (a) a bit rate reduction device for selectively applying bit rate reduction to the up to four coded video input bit streams to generate a set of bit rate reduced video bit streams each having a corresponding rate-reduced bit rate,(b) a compositing device for combining the bit rate reduced video bit streams into the composite video output bit stream, the composite video output bit stream having a bit transfer rate equal to the sum of the rate-reduced bit rates,wherein the bit rate reduction device selectively applies rate reduction to any of the up to four coded video input bit streams so as to provide a composite video output bit stream having a desired bit transfer rate;
(c) up to four buffers for receiving a corresponding plurality of up to four coded video input bit streams;
(d) a synchronization and multiplexing device for synchronizing the up to four coded video input bit streams and multiplexing the up to four coded video input bit streams into a single, compressed, composite video output bit stream;
(e) for each of the up to four coded video input bit streams, a corresponding transmission rate reduction system wherein a first compressed video bit stream having a first transfer rate is converted into a second compressed video bit stream having a second transfer rate, the second transfer rate being slower than the first transfer rate, the transmission rate reduction system comprising;
(i) a video multiplex decoder for demultiplexing and decoding the first video bit stream to generate (a) quantized DCT coefficient microblocks representing a plurality of digitized frequency components for the first video bit stream, (b) motion vector pairs specifying a vertical displacement and a horizontal displacement for each microblock; and
(c) header information specifying a starting point for a compressed video image, compressed video image synchronization information, and the location of each microblock or group of microblocks in the compressed video image;
(ii) a DCT coefficients processor for receiving quantized DCT coefficient microblocks from the video multiplex decoder and receiving quantization information from a rate control processor to generate a set of processed DCT coefficient microblocks containing fewer DCT coefficients than the number of coefficients in the quantized DCT coefficient microblocks received from the video multiplex decoder; and
(iii) a video multiplex encoder for encoding requantized DCT coefficient microblocks obtained from the DCT coefficients processor, for encoding a motion vector obtained from the DCT coefficients processor, and for multiplexing header information with the encoded motion vector and encoded DCT coefficient microblocks to produce the second compressed video bit stream; and
(f) a central rate control processor providing control information for the up to four DCT coefficients processors, the rate control processor comprising a processor for generating new quantization information for the up to four DCT coefficients processors, each DCT coefficients processor coupled to a transmission buffer, the new quantization information generated according to a transmission buffer status value specifying the number of available bits remaining in the video transmission buffer, and according to a desired bit rate for the composite video output bit stream.
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Accused Products
Abstract
Video composition techniques are disclosed for processing video information from a plurality of sources to provide a video image having a plurality of rectangular regions. Each rectangular region displays video information from a specific one of the plurality of video sources. The video information from each video source is in the form of an incoming digital bit stream. The digital bit stream from a first video source has a first bit rate, and the digital bit stream from a second video source has a second bit rate where the first bit rate may or may not be equal to the second bit rate. The incoming digital bit streams are fed to a rate matching circuit which converts all incoming digital bit streams to a common bit rate. The output of the rate matching circuit is fed to a synchronization arid multiplexer circuit which places video information from specific digital bit streams into corresponding rectangular regions of a composite video image.
169 Citations
3 Claims
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1. A compressed domain video composition system for integrating up to four coded video input bit streams into a composite video output bit stream in a compressed domain, the system comprising:
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(a) a bit rate reduction device for selectively applying bit rate reduction to the up to four coded video input bit streams to generate a set of bit rate reduced video bit streams each having a corresponding rate-reduced bit rate, (b) a compositing device for combining the bit rate reduced video bit streams into the composite video output bit stream, the composite video output bit stream having a bit transfer rate equal to the sum of the rate-reduced bit rates, wherein the bit rate reduction device selectively applies rate reduction to any of the up to four coded video input bit streams so as to provide a composite video output bit stream having a desired bit transfer rate; (c) up to four buffers for receiving a corresponding plurality of up to four coded video input bit streams; (d) a synchronization and multiplexing device for synchronizing the up to four coded video input bit streams and multiplexing the up to four coded video input bit streams into a single, compressed, composite video output bit stream; (e) for each of the up to four coded video input bit streams, a corresponding transmission rate reduction system wherein a first compressed video bit stream having a first transfer rate is converted into a second compressed video bit stream having a second transfer rate, the second transfer rate being slower than the first transfer rate, the transmission rate reduction system comprising; (i) a video multiplex decoder for demultiplexing and decoding the first video bit stream to generate (a) quantized DCT coefficient microblocks representing a plurality of digitized frequency components for the first video bit stream, (b) motion vector pairs specifying a vertical displacement and a horizontal displacement for each microblock; and
(c) header information specifying a starting point for a compressed video image, compressed video image synchronization information, and the location of each microblock or group of microblocks in the compressed video image;(ii) a DCT coefficients processor for receiving quantized DCT coefficient microblocks from the video multiplex decoder and receiving quantization information from a rate control processor to generate a set of processed DCT coefficient microblocks containing fewer DCT coefficients than the number of coefficients in the quantized DCT coefficient microblocks received from the video multiplex decoder; and (iii) a video multiplex encoder for encoding requantized DCT coefficient microblocks obtained from the DCT coefficients processor, for encoding a motion vector obtained from the DCT coefficients processor, and for multiplexing header information with the encoded motion vector and encoded DCT coefficient microblocks to produce the second compressed video bit stream; and (f) a central rate control processor providing control information for the up to four DCT coefficients processors, the rate control processor comprising a processor for generating new quantization information for the up to four DCT coefficients processors, each DCT coefficients processor coupled to a transmission buffer, the new quantization information generated according to a transmission buffer status value specifying the number of available bits remaining in the video transmission buffer, and according to a desired bit rate for the composite video output bit stream. - View Dependent Claims (2)
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3. A central rate control processor for use in a compressed domain video composition system including:
- (i) an input buffer for storing information from a plurality of coded video input bit streams, each coded video input bit stream having a corresponding input bit transfer rate, (ii) a bit rate reducing device coupled to the set of buffers for selectively reducing the bit transfer rates of any of the coded video input bit streams, (iii) a compositing device for combining the bit rate reduced video bit streams into the composite video output bit stream, (iv) a plurality of DCT coefficients processors, each DCT coefficients processor coupled to a corresponding coded video input bit stream, and (v) a multiple transmission buffer including a plurality of memory locations and coupled to the compositing device;
CHARACTERIZED IN THAT the central rate control processor includes; (a) a control signal generator for generating multiple control signals causing the selective application of bit rate reduction to the plurality of coded video input bit streams to generate a set of bit rate reduced video bit streams each having a corresponding rate-reduced bit rate, so as to provide a composite video output bit stream having a desired bit transfer rate, and wherein the desired bit transfer rate is substantially equal to the sum of the bit rate reduced video bit streams, and (b) a monitoring device coupled to the multiple transmission buffer for monitoring the relative number of loaded memory locations in the multiple transmission buffer, the relative number of loaded memory locations denoted as the transmission buffer status value; wherein the central rate control processor provides control information for the plurality of DCT coefficients processors, the rate control processor generating new quantization information for the plurality of DCT coefficients processors, each DCT coefficients processor coupled to the transmission buffer, the new quantization information generated according to the transmission buffer status value specifying the number of available bits remaining in the transmission buffer, and according to a desired bit rate for the composite video output bit stream.
- (i) an input buffer for storing information from a plurality of coded video input bit streams, each coded video input bit stream having a corresponding input bit transfer rate, (ii) a bit rate reducing device coupled to the set of buffers for selectively reducing the bit transfer rates of any of the coded video input bit streams, (iii) a compositing device for combining the bit rate reduced video bit streams into the composite video output bit stream, (iv) a plurality of DCT coefficients processors, each DCT coefficients processor coupled to a corresponding coded video input bit stream, and (v) a multiple transmission buffer including a plurality of memory locations and coupled to the compositing device;
Specification