Apparatus and method for efficient sharing of virtual memory translations

• US 5,630,087 A
• Filed: 11/02/1994
• Issued: 05/13/1997
• Est. Priority Date: 11/02/1994
• Status: Expired due to Term

• Current Assignee: Oracle America, Inc. (Oracle Corporation)
• Original Assignee: Sun Microsystems Incorporated (Oracle Corporation)
• Inventors: Khalidi, Yousef A., Talluri, Madhusudhan
• Primary Examiner(s): Moore, David K.
• Assistant Examiner(s): NGUYEN, THAN VINH
• Application Number:
  US08/333,487
• Time in Patent Office: 923 Days
• Field of Search: 395/417, 395/412, 395/416, 395/403, 395/413, 395/420, 395/415
• US Class Current: 711/202
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]

Abstract

A method and apparatus to share virtual memory translations in a computer is described. The apparatus includes an operating system that runs in conjunction with a central processing unit. The operating system is programmed to include an address identification routine to identify distinct virtual memory translation entries, associated with a plurality of distinct processes running on the computer, that map to one or more common physical memory page addresses. The operating system also includes a mask assignment routine to assign a first mask value to the distinct virtual memory translation entries, and a write routine to write, to a translation-lookaside buffer or a page table, the distinct virtual memory translation entries as a single address associated with the first mask value. A comparison mechanism is used to compare a second mask value of a translation-request virtual memory translation value to the first mask value to determine whether the second mask value corresponds to said first mask value. If the two mask values correspond, then the single address associated with the first mask value is used as a virtual memory translation address.

Claims

1. A method of sharing virtual memory translations, said method comprising the steps of:

identifying a plurality of distinct virtual memory translation entries, associated with a plurality of distinct processes running on a computer, that map to a common physical memory page address;

defining said plurality of distinct virtual memory translation entries as an equivalency class;

assigning a first mask value to said plurality of distinct virtual memory translation entries;

storing said plurality of distinct virtual memory translation entries as a single address associated with said first mask value; and

comparing a second mask value of a translation-request virtual memory translation value to said first mask value to determine whether said second mask value corresponds to said first mask value and thereby determine whether said translation-request virtual memory translation value maps to said common physical memory page address.

2. The method of claim 1 wherein said identifying step includes the step of identifying a plurality of distinct virtual memory translation entries, associated with a plurality of distinct processes running on a computer, that map to a common set of physical memory page addresses.

3. The method of claim 1 further comprising the step of identifying said equivalency class with an equivalency class bit.

4. The method of claim 3 further comprising the step of combining said equivalency class bit with said first mask value to form a context memory translation entry word.

5. The method of claim 1 wherein said storing step includes the step of storing said single address and said first mask value in a translation-lookaside buffer.

6. The method of claim 1 wherein said comparing step is performed with a translation-lookaside buffer.

7. The method of claim 1 wherein said storing step includes the step of storing said single address and said first mask value in a page table.

8. The method of claim 1 wherein said comparing step is performed with a page table search program.

9. A computer that shares virtual memory translations, said computer comprising:

a central processing unit;

an operating system executing in conjunction with said central processing unit, said operating system being programmed to include

an address identification routine to identify a plurality of distinct virtual memory translation entries, associated with a plurality of distinct processes running on said computer, that map to one or more common physical memory page addresses, said address identification routine defining said plurality of distinct virtual memory translation entries as an equivalency class,

a mask assignment routine to assign a first mask value to said plurality of distinct virtual memory translation entries, and

a write routine to write said plurality of distinct virtual memory translation entries as a single address associated with said first mask value; and

a comparison mechanism, operating in conjunction with said central processing unit and said operating system, to compare a second mask value of a translation-request virtual memory translation value to said first mask value to determine whether said second mask value corresponds to said first mask value and thereby determine whether said translation-request virtual memory translation value corresponds to said common physical memory page address.

10. The computer of claim 9 wherein said operating system is programmed to identify said equivalency class with an equivalency class bit.

11. The computer of claim 10 wherein said operating system is programmed to combine said equivalency class bit with said first mask value to form a context memory translation entry word.

12. The computer of claim 10 wherein said operating system is programmed to combine said equivalency class bit with said first mask value to form a context memory translation entry word corresponding to a plurality of equivalency classes.

13. The computer of claim 11 wherein said single address and said first mask value are written to a translation-lookaside buffer.

14. The computer of claim 13 wherein said translation-lookaside buffer is a fully associative translation-lookaside buffer.

15. The computer of claim 13 wherein said translation-lookaside buffer is a set-associative translation-lookaside buffer.

16. The computer of claim 13 wherein said translation-lookaside buffer also stores a context identification value, a virtual address value, and a physical page value in addition to said single address and said first mask value.

17. The computer of claim 11 wherein said comparison mechanism is a translation-lookaside buffer.

18. The computer of claim 11 wherein said single address and said first mask value are written to a page table.

19. The computer of claim 11 wherein said comparison mechanism is a page table search program.