Method for circuit fault detection in differential signal detectors

• US 5,632,280 A
• Filed: 07/25/1996
• Issued: 05/27/1997
• Est. Priority Date: 03/03/1995
• Status: Expired due to Term

• Current Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Original Assignee: Heartstream, Inc. (HP Inc.)
• Inventors: Powers, Daniel J., Leyde, Kent W., Lyster, Thomas D.
• Primary Examiner(s): Mullins, James B.
• Application Number:
  US08/685,999
• Time in Patent Office: 306 Days
• Field of Search: 330/2, 330/69, 330/258, 128/696, 128/908, 324/123 R, 324/123 C, 606/35, 607/63
• US Class Current: 600/508
• CPC Class Codes: H03F 2200/261 Amplifier which being suitable for instrumentation applications
• CPC Class Codes: H03F 3/45479 characterised by the way of common mode signal rejection

Abstract

The present invention is an apparatus and method for detecting differential mode signals in an environment where differential mode signals co-exist, and might be corrupted by, common mode signals. The most basic apparatus of the present invention essentially comprises first and second input leads through which both differential mode and common mode signals are input; a first amplifier block having a gain that is substantially one; and at least an inverting node and a non-inverting node connected to the first and second input leads. The output of the amplifier block is fed back to the input of the non-inverting node of the amplifier block in a manner to increase differential mode impedance while maintaining a low common mode impedance. Various embodiments of the basic presently claimed circuitry provides for additional methods of monitoring the level of common-mode signal introduced to the apparatus and other fault detection functions.

Claims

1. In an electrical circuit that detects differential mode signals in an environment where differential mode signals potentially co-exist with common mode signals wherein said circuit comprising,

first and second input leads through which both common mode and differential mode signals are input from at least one signal source,

a differential amplifier block having at least an output lead, an inverting node and a non-inverting node connected to said first and second input leads respectively, said amplifier block having a substantial differential gain of one and such that the signal from said output lead is input into said non-inverting node,

a potential reference,

a voltage source connected to said potential reference and to said inverting node of said amplifier block,

an input lead resistor connected to one of said input leads and its corresponding amplifier block node,

a method for continuous fault detection in said electrical circuit while detecting signals from a patient, the steps of said method comprising:

a) attaching the first and second input leads to the patient;

b) inputting a known voltage signal from said voltage source into the inverting node of the amplifier block;

c) monitoring the voltage signal on the output lead of the amplifier block; and

d) determining if fault conditions exist in the circuit based on the voltage signal received at the output lead.

2. The method as recited in claim 1 wherein the step of inputting a known voltage signal comprises inputting a known alternating voltage signal.

3. The method as recited in claim 2 wherein the step of inputting a known alternating voltage signal comprises inputting a known alternating voltage signal having a frequency substantially distinguishable from said common mode signal.

4. The method as recited in claim 1 wherein the step of inputting a known voltage signal comprises inputting a known voltage signal from a probe voltage source.

5. The method as recited in claim 1 wherein the step of inputting a known voltage signal comprises inputting a known voltage signal from a circuit, said circuit comprising:

a second operational amplifier block having an inverting node, a non-inverting node, and an output lead;

a first resistor connected to said inverting node of said differential amplifier block and to said inverting node of said second amplifier block;

a second resistor connected to said output lead of said second operational amplifier block and to said inverting node of said amplifier block; and

a probe voltage source connected to said potential reference and to said non-inverting node of said second amplifier block.

6. The method as recited in claim 1 wherein the step of determining if fault conditions exist further comprises determining if a short circuit in the input leads exists if the voltage signal received at the output node relates to the known voltage signal when the input leads are intentionally shorted.