Watchdog circuit of vehicle tracking system

• US 5,633,630 A
• Filed: 12/19/1991
• Issued: 05/27/1997
• Est. Priority Date: 01/29/1991
• Status: Expired due to Fees

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Hyun-Chul
• Primary Examiner(s): SWARTHOUT, BRENT
• Application Number:
  US07/810,175
• Time in Patent Office: 1,986 Days
• Field of Search: 340/988, 340/989, 340/991, 340/992, 340/903, 364/424.01, 364/449, 364/460, 455/54.1, 455/99, 455/116, 342/457, 371/16.3, 371/62, 375/108, 375/8, 375/70, 375/71, 375/98, 375/311, 395/185.08
• US Class Current: 340/992
• CPC Class Codes: G08G 1/123 indicating the position of vehicles, e.g. scheduled vehicles; Managing passenger vehicles circulating according to a fixed timetable, e.g. buses, trains, tramstransmission of navigation instructions to vehicles G08G1/0968

Abstract

Disclosed is a watchdog circuit of a vehicle tracking system for resetting a microcomputer by sensing a transmission time longer than a predetermined time owing to a false operation of a vehicle mounted equipment in case of transmitting a position signal, and for preventing a malfunction of a vehicle tracking system.

Claims

1. A watchdog circuit of a vehicle tracking system, comprising:

a microcomputer;

a code modulation and amplification circuit;

a high-frequency power amplifier;

a first timer for transmitting a first timed signal by counting during a time period for transmitting two frames of tracking data after receiving a power amplification control signal from said microcomputer;

a first logic gate for generating a transmission interruption control signal for said high-frequency power amplifier in response to said first timed signal counted during the time for transmitting two frames by said first timer and said power amplification control signal from said microcomputer;

a driving circuit for turning off said high-frequency power amplifier in response to said transmission interruption control signal from said first logic gate;

a second timer for transmitting a second timed signal for a frame transmission time after receiving said first timed signal counted during the time for transmitting two frames; and

a reset signal generator for generating a reset signal for resetting said microcomputer in response to said second timed signal counted for a frame transmission time by said second timer and said power amplification control signal from said microcomputer.

2. A watchdog circuit of a vehicle tracking system as claimed in claim 1, wherein said reset signal generator comprises:

a second logic gate for generating a reset generation control signal in response to said second timed signal and said power amplification control signal of said microcomputer; and

a one-shot circuit for generating said reset signal according to said reset generation control signal.

3. A cut-off circuit of a vehicle tracking system having a central control station, said cut-off circuit comprising:

microprocessing means for generating a control signal and a power amplification control signal;

code modulation and amplification means for generating a modulated signal by modulating and amplifying an intermediate signal in response to said control signal;

high frequency amplification means for amplifying said modulated signal for transmission via an antenna to said central control station;

first timing means for generating a first timed signal for a first predetermined time period in response to said power amplification control signal;

first logic means for generating a transmission interruption control signal in response to said first timed signal and said power amplification control signal;

driving means for turning off said high frequency amplification means to disable transmission of said modulated signal in response to said transmission interruption control signal;

second timing means for generating a second timed signal a second predetermined time period after said first timed signal; and

reset signal generating means for resetting said microprocessing means from a first mode to a second mode in response to said second timed signal and said power amplification control signal.

4. The cut-off circuit as claimed in claim 3, wherein said reset signal generating means comprises:

second logic means for generating a reset generation control signal in response to said power amplification control signal and said second timed signal; and

means for generating a reset pulse in response to said reset generation control signal, to reset said microprocessing means.

5. The cut-off circuit as claimed in claim 3, wherein said intermediate signal is a pseudo-random code signal.

6. The cut-off circuit as claimed in claim 3, wherein said first timing means generates said first timed signal for a period of time substantially the same as a time period necessary for transmitting two frames of tracking data.

7. The cut-off circuit as claimed in claim 3, wherein said second timing means generates said second timed signal for a period of time substantially the same as a time period necessary for transmitting one frame of tracking data.

8. The cut-off circuit as claimed in claim 3, wherein said first mode of said microprocessing means is a transmission mode and said second mode is a non-transmission mode.

9. The cut-off circuit as claimed in claim 4, wherein said first timing means generates said first timed signal for a period of time substantially the same as a time period necessary for transmitting two frames of tracking data and said second timing means generates said second timed signal for a period of time substantially the same as a time period necessary for transmitting one frame of tracking data.

10. The cut-off circuit as claimed in claim 3, wherein said microprocessing means generates said control signal during said first mode and said microprocessing means does not generate said control signal during said second mode.

16. The cut-off circuit as claimed in claim 4, wherein said first timing means generates said first timed signal for a period of time substantially the same as a time for transmitting two frames of tracking data and said second timing means generates said second timed signal for a period of time substantially the same as a time for transmitting one frame of tracking data.

17. The cut-off circuit as claimed in claim 16, wherein said first and second logic means comprise a first and a second AND gate, respectively.

11. A cut-off circuit of a vehicle tracking system including a central control station, said cut-off circuit comprising:

microprocessing means for generating a control signal and a power amplification control signal during a transmission mode for transmission of tracking data;

code modulation and amplification means for generating a modulated signal by amplifying and modulating an intermediate signal in response to said control signal;

high frequency amplification means for amplifying a high frequency component of said modulated signal and transmitting the amplified high frequency component via an antenna to the central control station;

transmission interruption means for turning off said high frequency amplification means after a first time interval counted from the generation of said power amplification control signal, said transmission interruption means comprising first timing means for generating a first timed signal in response to said power amplification control signal, first logic means for generating a transmission interruption control signal in response to said first timed signal and said power amplification control signal, and driving means for turning off said high frequency amplification means in response to said transmission interruption control signal;

second timing means for generating a second timed signal after said first time interval; and

mode reset means, connected to said transmission interruption means and said microprocessing means, responsive to said second timing means for resetting said microprocessing means from said transmission mode to a non-transmission mode in response to said second timed signal.

12. The cut-off circuit as claimed in claim 11, wherein said mode reset means comprises:

second logic means for generating a reset generation control signal in response to said power amplification control signal and said second timed signal; and

means for generating a reset signal in response to said reset generation control signal to reset said microprocessing means from said transmission mode to said non-transmission mode.

13. A cut-off circuit of a vehicle tracking system including a central control station, said cut-off circuit comprising:

microprocessing means for generating a control signal and a power amplification control signal during a transmission mode for transmission of tracking data;

code modulation and amplification means for generating a modulated signal by amplifying and modulating an intermediate signal in response to said control signal;

high frequency amplification means for amplifying a high frequency component of said modulated signal and transmitting the amplified high frequency component via an antenna to the central control station;

first timing means for generating a first timed signal for a first interval that is substantially equal to a time period for transmission of two frames of tracking data to the central control station, in response to said power amplification control signal;

first logic means for generating a transmission interruption control signal in response to said first timed signal and said power amplification control signal;

driving means for turning off said high frequency amplification means in response to said transmission interruption control signal;

second timing means for generating a second timed signal for a second interval that is substantially equal to a time period for transmission of one frame of tracking data to the central control station, after said first interval in response to said first timed signal; and

reset signal generating means for resetting said microprocessing means from said transmission mode to a non-transmission mode during said second interval in response to continued generation of said power amplification control signal after said first interval.

14. The cut-off circuit as claimed in claim 13, wherein said reset signal generating means comprises:

second logic means for generating a reset generation control signal in response to said power amplification control signal and said second timed signal; and

means for generating a reset pulse in response to said reset generation control signal.

15. The cut-off circuit as claimed in claim 14, wherein said first timing means generates said first timed signal for a period of time substantially the same as a time for transmitting two frames of tracking data.

18. The cut-off circuit as claimed in claim 14, wherein said first and second logic means comprise a first and a second AND gate, respectively.

19. A process for preventing malfunction of a vehicle tracking device including a microcomputer for generating a power amplification control signal during a transmission mode for transmission of tracking data, a modulator responsive to said microcomputer for modulating pseudo random code to generate pseudo random code signals, and a high frequency power amplifier for amplifying said pseudo random code signals for transmission to a central control station, said process including:

counting a transmission time of two successive frames of track data for a first time period by a first timer in response to said power amplification control signal;

disabling operation of said high frequency power amplifier from transmitting said pseudo random code signals to the central control station in response to expiration of said first time period;

counting a transmission time of a single frame of track data for a second time period by a second timer in response to expiration of said first time period; and

generating a reset signal for resetting said microcomputer from said transmission mode to a non-transmission mode upon initiation of said second time period in response to continued generation of said power amplification control signal by said microcomputer during said second time period.

20. A process as claimed in claim 19, further comprised of said reset signal being generated by a serially connected AND gate and a one-shot circuit responding to said continued generation of said power amplification control signal and to said expiration of said second time period.

21. A process as claimed in claim 19, further comprised of said first time period being substantially twice longer than said second time period.

22. A vehicle tracking device including a central control station, comprising:

first means for generating a modulation control signal and a power amplification control signal during a first operational mode enabling transmission of tracking data;

second means for modulating pseudo random code signals indicative of said tracking data in response to said modulation control signal;

third means for amplifying said modulated pseudo random code signals for radio frequency transmission to the central control station;

fourth means comprising a first timer for generating a first counting signal continuously for only a first time period counted in response to generation of said power amplification control signal;

fifth means comprising a first logic gate for generating a transmission interruption control signal in response to a logical combination of said first counting signal and said power amplification control signal to disable said third means from amplifying said pseudo random code signals for radio frequency transmission to the central control station when said first counting signal indicates expiration of said first time period; and

sixth means for responding to said power amplification control signal after indication by said first counting signal of said expiration of said first time period by generating a reset signal to reset said first means from said first operational mode to a second operational mode discontinuing generation of said modulation control signal and said power amplification control signal.

23. A vehicle tracking device as claimed in claim 22, further comprised of said first time period corresponding to a time required for transmitting two successive frames of tracking data.

24. A vehicle tracking device as claimed in claim 22, further comprised of said first logic gate of said fifth means corresponding a AND gate.

25. A vehicle tracking device as claimed in claim 23, wherein said sixth means comprises

a second timer for generating a second counting signal continuously for only a second time period in response to said first counting signal indicating expiration of said first time period;

a second logic gate for generating a reset generation control signal in response to a logical combination of said second counting signal and said power amplification control signal; and

one-shot means for generating said reset signal to reset said first means from said first operational mode to said second operational mode in response to said reset generation control signal.