Mold runner removal from a substrate-based packaged electronic device

• US 5,635,671 A
• Filed: 03/16/1994
• Issued: 06/03/1997
• Est. Priority Date: 03/16/1994
• Status: Expired due to Term

• Current Assignee: Amkor Technology Singapore Holding Pte., Ltd. (Amkor Technology Incorporated)
• Original Assignee: Amkor Electronics, Inc. (Amkor Technology Incorporated), Anam Industrial Co., Ltd.
• Inventors: Shim, Il K., Heo, Young W., Briar, John, Freyman, Bruce J.
• Primary Examiner(s): Ledynh, Bot L.
• Application Number:
  US08/214,339
• Time in Patent Office: 1,175 Days
• Field of Search: 29/827, 29/841, 174/52.1-52.4, 257/779, 257/787, 257/788, 361/748, 361/749, 361/760-762, 437/183
• US Class Current: 174/527
• CPC Class Codes: H01L 21/4864 Cleaning, e.g. removing of solder
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/4985 Flexible insulating substrates H01L23/49572 and H01L23/49855 take precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15173 : in a single layer of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor

Abstract

According to the invention, an electronic device mounted on a substrate is encapsulated using a standard two-piece mold. A novel degating region is formed on a surface of the substrate to allow removal of excess encapsulant formed on the surface during molding without damaging the remainder of the device. The material of the degating region that contacts the encapsulant forms a weak bond with the encapsulant, relative to the bond formed between the encapsulant and the substrate, so that the encapsulant can be peeled away from the degating region without damaging the substrate or other portion of the device. The degating region is provided without introducing additional steps into the process for forming the device. The presence of the degating region eliminates the necessity of using a three-piece or modified two-piece mold to achieve top gating in order to degate without damaging the device. In one embodiment, the degating region is made of gold. Gold has an adhesive force with typical encapsulant materials that is approximately 10% of the adhesive force between the typical encapsulant materials and typical substrate materials.

Claims

1. A substrate-based packaged electronic device, comprising:

a substrate having first and second surfaces;

a degating region on the first surface of the substrate;

a degating region material on the degating region;

a structure for making external electrical connection from the substrate-based packaged electronic device on the second surface of the substrate;

an electronic device attached to the first surface of the substrate, the electronic device being electrically connected to the structure for making external electrical connection; and

package encapsulant including an encapsulant material formed on the first surface of the substrate to enclose the electronic device, the degating region being formed outside the package encapsulant, wherein;

the encapsulant material and the degating region material are chosen such that the adhesive force between the encapsulant material and the degating region material is less than the adhesive force between the encapsulant material and the substrate.

2. A substrate-based packaged electronic device as in claim 1, wherein the adhesive force between the encapsulant material and the degating region material is less than one half the adhesive force between the encapsulant material and the substrate.

3. A substrate-based packaged electronic device as in claim 1, wherein the adhesive force between the encapsulant material and the degating region material is approximately 10% of the adhesive force between the encapsulant material and the substrate.

4. A substrate-based packaged electronic device as in claim 1, wherein the degating region material is gold.

5. A substrate-based packaged electronic device as in claim 4, wherein the encapsulant material is a thermosetting epoxy resin.

6. A substrate-based packaged electronic device as in claim 1, wherein the structure for making external electrical connection further comprises a plurality of solder bumps formed on the second surface of the substrate.

7. A substrate-based packaged electronic device as in claim 1, wherein the electronic device is an integrated circuit chip.

8. A substrate-based packaged electronic device as in claim 7, wherein the adhesive force between the encapsulant material and the degating region material is approximately 10% of the adhesive force between the encapsulant material and the substrate.

9. A substrate-based packaged electronic device as in claim 7, wherein the degating region material is gold.

10. A substrate-based packaged electronic device as in claim 1, wherein the substrate is a multilayer substrate, electrically conductive traces and/or regions being formed within the multilayer substrate.

11. A substrate-based packaged electronic device as in claim 1 further comprising excessive encapsulant including the encapsulant material formed on the degating region.

12. A substrate-based packaged electronic device as in claim 1, wherein the degating region material is palladium.

13. A substrate-based packaged electronic device as in claim 1, wherein the degating region extends to an edge of the package encapsulant.

15. A substrate as in claim 11, wherein the adhesive force between the encapsulant material and the degating region material is approximately 10% of the adhesive force between the encapsulant material and the substrate.

16. A substrate as in claim 11 wherein the substrate is one of a plurality of substrates formed in a strip configuration for use in forming a plurality of substrate-based packaged electronic devices.

17. A substrate as in claim 13, wherein the adhesive force between the encapsulant material and the degating region material is approximately 10% of the adhesive force between the encapsulant material and the substrate.

14. A substrate for use in forming a substrate-based packaged electronic device, wherein:

a surface of the substrate is adapted for mounting an electronic device;

further comprising;

a degating region on the surface of the substrate at a location such that the edges of a mold runner of a mold used to encapsulate the electronic device in encapsulant material fit entirely within the degating region when the substrate is positioned in the mold during encapsulation of the electronic device; and

a degating region material on the degating region, the degating region material being chosen such that the adhesive force between the encapsulant material and the degating region material is less than the adhesive force between the encapsulant material and the substrate.