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High-speed block id encoder circuit using dynamic logic

  • US 5,635,862 A
  • Filed: 12/29/1995
  • Issued: 06/03/1997
  • Est. Priority Date: 12/29/1995
  • Status: Expired due to Fees
First Claim
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1. A high-speed block identifier encoder circuit comprising:

  • a plurality of output signal lines for providing an encoded output identifying which one of a plurality of input signals from an array is asserted;

    a first portion coupled to the plurality of output signal lines for pre-charging the plurality of output signal lines to a first state; and

    a plurality of transistors coupled together in a single level for receiving the plurality of input signals and for discharging the plurality of output signal lines to a second state based on the plurality of input signals.

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