Two-stage differential sense amplifier with positive feedback in the first and second stages

• US 5,640,356 A
• Filed: 12/29/1995
• Issued: 06/17/1997
• Est. Priority Date: 12/29/1995
• Status: Expired due to Term

• Current Assignee: RPX Corporation
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Gibbs, Gary Austin
• Primary Examiner(s): Nelms, David C.
• Assistant Examiner(s): NIRANJAN, FRANK
• Application Number:
  US08/578,187
• Time in Patent Office: 536 Days
• Field of Search: 365/205, 365/207, 365/208, 327/53, 327/54
• US Class Current: 365/207
• CPC Class Codes: G11C 7/062 Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs

Abstract

An improved sense amplifier for receiving differential inputs and providing an output signal. A level shifting circuit for receiving differential inputs (IN and IN) is provided. A pre-amplification circuit that is coupled to the level shifting circuit provides gain to the differential outputs. A first inverter is coupled to the pre-amplification circuit and provides high voltage gain to the output signal. The first inverter includes a power port for receiving a power voltage signal and a ground port for receiving a ground signal. A second inverter that has a ground port and a power port is coupled to the pre-amplification circuit. The power port of the first and second inverters are coupled to the power voltage supply through a first transistor. Similarly, the ground port of the first and second inverters are coupled to the ground via a second transistor. The output of the second inverter is coupled to the gate of the first and second transistors and controls the first and second transistors.

Claims

1. A sense amplifier for receiving differential inputs and providing an output signal, said differential inputs including a true signal and a complement signal, said sense amplifier comprising:

a) a pre-amplification circuit, coupled to said differential inputs for providing gain to the true and complement signals, said pre-amplification circuit having a first output for generating an amplified true signal and a second output for generating an amplified complement signal;

b) a first driver, coupled to the pre-amplification circuit, having an input for receiving the amplified complement signal and an output for generating the output signal, said first driver including a first port for receiving a first reference voltage signal and a second port for receiving a second reference voltage signal;

c) a second driver, coupled to the pre-amplification circuit, having an input port for receiving the amplified true signal, a first port for receiving the first reference voltage signal, a second port for receiving the second reference voltage signal, and an output port for generating a first control signal; and

d) a first transistor having a first electrode coupled to the first reference voltage signal, a second electrode to the first port of the first driver and a third electrode coupled to the output of the second transistor.

2. The sense amplifier as claimed in claim 1, further comprising a second transistor having a first electrode coupled to the second port of the first and second drivers, a second electrode coupled to the second reference voltage signal, and a third electrode coupled to the output of the second driver and the third electrode of the first transistor.

3. The sense amplifier as claimed in claim 1, wherein the first and second drivers are inverters.

4. A sense amplifier for receiving differential inputs and providing an output signal, said sense amplifier comprising:

a) a level shifting circuit having a first input for receiving a complement signal and a second input for receiving a true signal;

b) a pre-amplification circuit, coupled to the level shifting circuit for providing gain to the true and complement signals;

said pre-amplification circuit having a first output for generating an amplified true signal and a second output for generating an amplified complement signal;

c) a first driver, coupled to the pre-amplification circuit, having an input for receiving the amplified complement signal and an output for generating the output signal, said first driver including a first port for receiving a first reference voltage signal and a second port for receiving a second reference voltage signal;

d) a second driver, coupled to the pre-amplification circuit, for receiving the amplified true signal and generating a first control signal;

e) a first transistor having a first electrode coupled to the first reference voltage signal and a second electrode coupled to the power port of the first driver and the second driver, said first transistor having a third electrode; and

f) a second transistor having a first electrode coupled to the ground port of the first and second drivers and a second electrode coupled to the second reference voltage signal, said second transistor having a third electrode coupled to the output of the second driver the third electrode of the first transistor.

5. The sense amplifier of claim 4, wherein the first and second drivers are inverters.