Direct downconverter circuit for demodulator in digital data transmission system

• US 5,640,424 A
• Filed: 05/16/1995
• Issued: 06/17/1997
• Est. Priority Date: 05/16/1995
• Status: Expired due to Fees

• Current Assignee: Interstate Electronics Corp. (L3Harris Technologies, Inc.)
• Original Assignee: Interstate Electronics Corp. (L3Harris Technologies, Inc.)
• Inventors: Gomez, George, Nguyen, Long Quoc, Banavong, Noi N., Tu, Dan Q.
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): Ghebretinsae, T.
• Application Number:
  US08/442,510
• Time in Patent Office: 763 Days
• Field of Search: 375/316, 375/345, 375/340, 375/344, 455/234.1, 455/232.1, 455/208, 330/254, 329/302, 329/306
• US Class Current: 375/316
• CPC Class Codes: H04L 27/2332 using a non-coherent carrier

Abstract

A digital downconverter circuit for a digital data transmission system is provided, comprising (i) a bandpass filter circuit for filtering a received analog intermediate frequency (IF) carrier signal onto which baseband information has been modulated, and outputting a bandpass analog IF signal; (ii) an analog-to-digital converter for converting the bandpass analog IF signal into a bandpass digital IF signal; (iii) a phase shifter device for outputting a complex pair of phase shifted baseband signals operating at a local baseband frequency; (iv) a mixer device for mixing the bandpass digital IF signal separately with each of the complex pair of phase shifted baseband signals and outputting a complex combined baseband/bandpass signal comprising inphase and quadrature components; (v) filtering circuitry for recovering the baseband information onto the phase shifted baseband signals; and (vi) sampling circuitry for sampling the information-bearing recovered baseband signals and outputting a sampled complex baseband output signal. The phase shifter device, the mixer device, the filtering circuitry, and the sampling circuitry are all implemented on a gallium arsenide (GaAs) application specific integrated circuit (ASIC). The filtering circuitry includes a single half-band pre-filter and a multi-pole low pass filter. The analog-to-digital converter operates at the sampling clock frequency, which is about 512 megahertz (MHz), and the IF carrier signal operates at about 52-176 MHz. An automatic gain control circuit controls the amplitude of the bandpass analog IF signal prior to its being converted into the bandpass digital IF signal.

Claims

1. A digital downconverter circuit for a digital data transmission system, comprising:

an input for receiving an analog intermediate frequency (IF) carrier signal onto which baseband information has been modulated;

a bandpass filter circuit for filtering said received analog IF carrier signal and outputting a bandpass analog IF signal;

an analog-to-digital converter for converting said bandpass analog IF signal into a bandpass digital IF signal;

a phase shifter device for outputting a complex pair of phase shifted baseband signals operating at a local baseband frequency;

a digital mixer device for mixing said bandpass digital IF signal separately with each of said complex pair of phase shifted baseband signals and outputting a complex combined baseband/bandpass signal comprising in-phase and quadrature components;

filtering circuitry for recovering baseband information from said in-phase and quadrature components of said complex combined baseband/bandpass signal and outputting information-bearing in-phase and quadrature baseband signals, said filtering circuitry including a half-band pre-filter and a low pass filter; and

sampling circuitry operating at a predetermined sampling frequency for sampling said information-bearing recovered baseband signals and outputting a sampled complex baseband output signal.

2. The digital downconverter circuit of claim 1, wherein said bandpass filter circuit consists of a single bandpass filter.

3. The digital downconverter circuit of claim 2, wherein said low pass filter is implemented in a multi-pole configuration.

4. The digital downconverter circuit of claim 1, further comprising a downsampling circuit interposed between said half-band pre-filter and said low pass filter.

5. The digital downconverter circuit of claim 4, wherein said downsampling circuit samples every other sample output by said half-band pre-filter to provide said low pass filter with a signal operating at half the frequency of that which is input to said half-band pre-filter.

6. The digital downconverter circuit of claim 1, wherein said analog-to-digital converter operates at said sampling frequency.

7. The digital downconverter circuit of claim 6, wherein said sampling frequency operates at about 512 megahertz (MHz) and said analog intermediate frequency (IF) carrier signal operates at between 52 megahertz (MHz) and 176 megahertz (MHz).

8. The digital downconverter circuit of claim 7, wherein said IF carrier signal operates at between 52 megahertz (MHz) and 176 megahertz (MHz).

9. The digital downconverter circuit of claim 1, wherein said phase shifter device, said mixer device, said filtering circuitry, and said sampling circuitry are implemented on an application specific integrated circuit (ASIC).

10. The digital downconverter circuit of claim 9, wherein said ASIC utilizes gallium arsenide (GaAs) technology.

11. The digital downconverter circuit of claim 9, wherein said pair of phase shifted baseband signals are phase shifted by ninety degrees.

12. The digital downconverter circuit of claim 11, further comprising an automatic gain control circuit for controlling the amplitude of said bandpass analog IF signal prior to its being converted into said bandpass digital IF signal.

13. The digital downconverter circuit of claim 11, wherein said sampling circuitry operates to sample between two and eight samples per data symbol passing therethrough.

14. The digital downconverter circuit of claim 13, wherein said sampled complex baseband output signal operates at between one and sixteen megabits per second.

15. A method for recovering baseband information from a carrier signal which has been modulated onto an intermediate frequency (IF) carrier signal, the method comprising the steps of:

receiving an analog intermediate frequency (IF) carrier signal onto which baseband information has been modulated;

filtering said received analog IF carrier signal using a bandpass filter circuit and outputting a bandpass analog IF signal;

converting said bandpass analog IF signal into a bandpass digital IF signal using an analog-to-digital converter;

outputting a complex pair of phase shifted baseband signals operating at a local baseband frequency using a phase shifter device;

mixing said bandpass digital IF signal, using a digital mixer device, separately with each of said complex pair of phase shifted baseband signals and outputting a complex combined baseband/bandpass signal comprising in-phase and quadrature components;

recovering, using filtering circuitry including a half-band pre-filter and a low pass filter, said baseband information from said in-phase and quadrature components of said complex combined baseband/bandpass signal, and outputting information-bearing in-phase and quadrature baseband signals; and

sampling said information-bearing recovered baseband signals using sampling circuitry operating at a sampling frequency and outputting a sampled complex baseband output signal.

16. The method of claim 15, wherein said bandpass filter circuit consists of a single bandpass filter.

17. The method of claim 15, wherein said low pass filter is implemented in a multi-pole configuration.

18. The method of claim 15, further comprising the step of sampling every other sample output by said half-band pre-filter to provide said low pass filter with a signal operating at half the frequency of that which is input to said half-band pre-filter.

19. The method of claim 15, further comprising the step of operating said analog-to-digital converter at said local baseband frequency.

20. The method of claim 19, wherein said sampling frequency operates at about 512 megahertz (MHz) and said analog intermediate frequency (IF) carrier signal operates at between 52 megahertz (MHz) and 176 megahertz (MHz).

21. The method of claim 20, wherein said IF carrier signal operates at between 52 megahertz (MHz) and 176 megahertz (MHz).

22. The method of claim 15, wherein said phase shifter device, said mixer device, said filtering circuitry, and said sampling circuitry are implemented on an application specific integrated circuit (ASIC).

23. The method of claim 22, wherein said ASIC utilizes gallium arsenide (GaAs) technology.

24. The method of claim 19, wherein said pair of phase shifted baseband signals are phase shifted by ninety degrees.

25. The method of claim 19, further comprising the step of automatically controlling the gain of the amplitude of said bandpass analog IF signal prior to its being converted into said bandpass digital IF signal.

26. The method of claim 19, wherein said sampling circuitry operates to sample between two and eight samples per data symbol passing therethrough.

27. The method of claim 26, wherein said sampled complex baseband output signal operates at between one and sixteen megabits per second.