Insulated gate semiconductor device and driving circuit device and electronic system both using the same

• US 5,642,252 A
• Filed: 08/15/1994
• Issued: 06/24/1997
• Est. Priority Date: 08/18/1993
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Hitachi, Ltd., Hitachi ULSI Engineering Corp
• Inventors: Sakamoto, Kozo, Tsunoda, Hideki, Shono, Harutora, Uchid, Ken, Yoshida, Isao, Iijima, Tetsuo, Kobayashi, Masayoshi, Otaka, Shigeo
• Primary Examiner(s): Gaffin, Jeffrey A.
• Assistant Examiner(s): JACKSON, STEPHEN W
• Application Number:
  US08/288,729
• Time in Patent Office: 1,044 Days
• Field of Search: 361/18, 361/56, 361/91, 361/103, 361/93, 361/115
• US Class Current: 361/93.9
• CPC Class Codes: H01L 27/0248 for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
• CPC Class Codes: H01L 27/0251 for MOS devices
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7804 the other device being a pn-junction diode
• CPC Class Codes: H02H 5/044 using a semiconductor device to sense the temperature
• CPC Class Codes: H03K 17/0822 in field-effect transistor switches
• CPC Class Codes: H03K 2017/0806 against excessive temperature

Abstract

An improvement in conditions that protective functions of an insulated gate semiconductor device with a protection circuit incorporated therein are performed, an improvement in the cutoff of heating, the prevention of malfunctions and an improvement in ease of usage can be achieved.

The insulated gate semiconductor device of the present invention comprises a power insulated gate semiconductor element (M9), at least one MOSFET (M1 through M7) for a protection circuit, for controlling the power insulated gate semiconductor element, a constant-voltage circuit using forward voltages developed across diodes (D2a through D2f) for the constant-voltage circuit, and voltage restricting diodes (D1 and D0a through D0d) for controlling the upper limit of a power supply voltage of the constant-voltage circuit. Power to be supplied to the voltage restricting diodes is supplied from an external gate terminal of the power insulated gate semiconductor element.

The present invention can bring about an advantageous effect that an improvement in reliability of the insulated gate semiconductor device and an improvement in the ease of use can be achieved.

Claims

1. A semiconductor device comprising:

a first terminal;

a second terminal;

a third terminal;

a first insulated gate transistor having a first current path coupled between said second terminal and said third terminal, and a gate coupled to said first terminal;

a second insulated gate transistor having a second current path coupled between said second terminal and said third terminal and a gate coupled to said first terminal, for monitoring a drain current supplied to the first current path of the first insulated gate transistor;

a first diode having an anode coupled to said first terminal, and a cathode, for preventing a current flowing from the second terminal to the first terminal when an overvoltage appears at the first terminal;

a switch circuit having a third current path coupled between said cathode of said first diode and said third terminal, and a control terminal coupled to one end of said second current path of said second insulated gate transistor, wherein the switch circuit is turned on to limit the drain current of the first insulated gate transistor based on the monitored drain current of the first insulated gate transistor; and

a protection circuit for preventing a breakdown of the first diode when the overvoltage appears at the first terminal, said protection circuit being coupled between said first terminal and said third terminal.

2. A semiconductor device according to claim 1,

wherein the overvoltage is a negative voltage against a voltage value of the third terminal.

3. A semiconductor device according to claim 1,

wherein said switch circuit comprises a first MOSFET having a drain-source path coupled between said cathode of said first diode and said third terminal, and having a gate coupled to said control terminal.

4. A semiconductor device according to claim 3,

wherein said first MOSFET is of an n-channel type.

5. A semiconductor device according to claim 1,

wherein said first insulated gate transistor includes a second MOSFET, and

wherein said second insulated gate transistor includes a third MOSFET.

6. A semiconductor device according to claim 5,

wherein the semiconductor device is fabricated on a single semiconductor substrate.

7. A semiconductor device according to claim 1,

wherein said first insulated gate transistor includes a first insulated gate bipolar transistor;

and

wherein said second insulated gate transistor includes a second insulated gate bipolar transistor.

8. A semiconductor device according to claim 7,

wherein the semiconductor device is fabricated on a single semiconductor substrate.

9. A semiconductor device according to claim 1,

wherein said protection circuit comprises a second diode having an anode coupled to said third terminal, and a cathode coupled to said first terminal.

10. A semiconductor device according to claim 9, wherein said protection circuit further comprises a third diode having an anode coupled to said third terminal and a cathode coupled to said anode of said second diode.

11. A semiconductor device according to claim 9,

wherein said protection circuit further comprises a third diode having an anode coupled to the anode of the second diode, and a cathode coupled to said third terminal.

12. A semiconductor device according to claim 9,

wherein a with stand voltage of the first diode is larger than a forward voltage of the second diode.

13. A semiconductor device according to claim 9, wherein the first and second diodes are polycrystalline silicon diodes.

14. A semiconductor device according to claim 9,

wherein the overvoltage is a negative voltage against a voltage value of the third terminal.

15. A semiconductor device comprising:

a first terminal;

a second terminal;

a third terminal;

an insulated gate transistor having a current path coupled between said second terminal and said third terminal, and a gate coupled to said first terminal;

a temperature detecting circuit including a temperature detecting element for detecting a temperature of said semiconductor device, wherein said temperature detecting circuit outputs a temperature detecting signal when the temperature of said semiconductor device is greater than or equal to a predetermined value, and wherein said temperature detecting element is coupled between said first terminal and said third terminal;

a first switch circuit having a first current path coupled between said first terminal and said third terminal, and a first control terminal coupled to receive said temperature detecting signal, the first switch circuit being turned on so as to cutoff the insulated gate transistor in response to said temperature detecting signal; and

a constant-voltage circuit for generating an operating voltage of the temperature detecting circuit, and which is coupled between said first terminal and said third terminal;

wherein the constant-voltage circuit includes a first diode having a first anode coupled to the first terminal and a first cathode coupled to the third terminal;

wherein the temperature detecting element includes a second diode having a second anode coupled to a second control terminal and a second cathode coupled to the third terminal;

wherein the temperature detecting circuit further includes;

a second switch circuit having a second current path coupled between the first terminal, the third terminal, and the first control terminal, and having the second control terminal, the second switch circuit generating the temperature detecting signal; and

a first resistor coupled between the second control terminal and the first terminal; and

wherein the temperature detecting element is coupled between the second control terminal and the third terminal.

16. A semiconductor device according to claim 15, further comprising:

a third diode having a third anode coupled to the third terminal and a third cathode coupled to the first terminal, for limiting an overvoltage value of the first terminal.

17. A semiconductor device according to claim 15,

wherein the first switch circuit comprises a first MOSFET having a first gate terminal coupled to the first control terminal, and having a first drain terminal and a first source terminal coupled to the first current path;

wherein the second switch circuit comprises a second MOSFET having a second gate terminal coupled to the second control terminal, and having a second drain terminal and a second source terminal coupled to the second current path; and

wherein the temperature detecting signal is output from the second drain terminal of the second MOSFET to the first gate terminal of the first MOSFET.

18. A semiconductor device according to claim 17, further comprising:

a latch circuit coupled between the second drain terminal and the first gate terminal, for holding the temperature detecting signal.

19. A semiconductor device according to claim 18,

wherein the semiconductor device is fabricated on a single semiconductor substrate.

20. A semiconductor device comprising:

a first terminal;

a second terminal;

a third terminal;

an insulated gate transistor having a current path coupled between said second terminal and said third terminal and a gate coupled to said first terminal;

a temperature detecting device adapted to output a temperature detecting signal when the temperature of said device is greater than or equal to a predetermined value;

a switch circuit having a current path coupled between said first terminal and said third terminal, and a control terminal coupled to receive said temperature detecting signal; and

a pad formed over a semiconductor substrate in which said insulated gate transistor, said temperature detecting device, and said switch circuit are formed, said pad being coupled to said third terminal;

wherein said pad is arranged substantially at a center of said semiconductor substrate; and

wherein said temperature detecting device is arranged adjacent to said pad.

21. A semiconductor device comprising:

an insulated gate transistor;

a hysteresis-type cutoff circuit adapted to cut off said insulated gate transistor when a temperature of said semiconductor device is higher than or equal to a first temperature, and adapted to bring said insulated gate transistor into a conductive state when a temperature of said semiconductor device is lower than or equal to a second temperature; and

a latch circuit adapted to continuously hold said insulated gate transistor at a cutoff state when a temperature of said device is changed to a temperature greater than or equal to a third temperature higher than said first temperature.

22. A semiconductor device comprising,

an insulated gate transistor;

a hysteresis-type cutoff circuit adapted to cut off said insulated gate transistor when a temperature of said device is higher than or equal to a first temperature, and adapted to bring said insulated gate transistor into a conductive state when a temperature of said device is lower than or equal to a second temperature;

a current detecting circuit adapted to detect a current of said insulated gate transistor; and

an overcurrent protection circuit adapted to render said insulated gate transistor non-conductive when said current of said insulated gate transistor is larger than or equal to a predetermined value.

23. A semiconductor device comprising:

an insulated gate transistor;

a hysteresis-type cutoff circuit adapted to cut off said insulated gate transistor when a current of said insulated gate transistor is higher than or equal to a first value, and adapted to bring said insulated gate transistor into a conductive state when a current of said insulated gate transistor is lower than or equal to a second value which is smaller than said first value; and

a latch circuit adapted to continuously hold said insulated gate transistor at a cutoff state when a temperature of said device is changed to a predetermined temperature.