Method and apparatus for initializing a multiprocessor system

• US 5,642,506 A
• Filed: 01/16/1996
• Issued: 06/24/1997
• Est. Priority Date: 12/14/1994
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Lee, Van Hoa
• Primary Examiner(s): Kriess, Kevin A.
• Assistant Examiner(s): COURTENAY III, ST JOHN
• Application Number:
  US08/587,259
• Time in Patent Office: 525 Days
• Field of Search: 395/650, 395/700
• US Class Current: 713/1
• CPC Class Codes: G06F 15/177 Initialisation or configuration control processor initialisation G06F9/4405
• CPC Class Codes: G06F 9/4405 Initialisation of multiprocessor systems

Abstract

An apparatus and method for booting a multiprocessor computer system including providing a first portion of boot code to multiple processors for execution, selecting a first processor, the selection based on which of the multiple processors first successfully executes the first portion of the boot code, providing a second portion of the boot code only to the first processor, and the first processor executing the second portion of the boot code to configure the multiprocessor system.

Claims

1. A method of initializing a plurality of processors of a multiprocessor system comprising the steps of:

executing a first portion of initialization code by each of the plurality of processors;

executing a second portion of initialization code by a first processor that obtains a master flag from a shared memory connected to all of said plurality of processors while denying access to said second portion to all remaining processors;

initializing overall system test and configuration by synchronizing the remaining processors, initializing and updating dialog structures for all processors, said dialog structures indicating levels of functionality of each of the plurality of processors; and

said first processor configuring the multiprocessor system by distributing subportions of said second portion of said initialization code to other processors for execution.

2. The method of claim 1 including the step of executing said first portion of ininialization code from the shared memory.

7. The method of claim 1 wherein said other processors execute different subportions of said initialization code.

3. A multiprocessor system comprising:

means for executing a first portion of initialization code by a plurality of processors;

means for executing a second portion of initialization code by a first processor that obtains a master flag from a shared memory connected to all of said plurality of processors while denying access to said second portion to all remaining processors;

means for initializing overall system test and configuration including means for synchronizing the remaining processors, means for initializing and updating dialog structures for all processors, said dialog structures indicating levels of functionality of each of the plurality of processors; and

means, using said first processor to distribute subportions of said second portion of said initialization code to other processors for execution, for configuring the multiprocessor system.

4. The multiprocessor system of claim 3 including means for executing said first portion of initialization code from the shared memory.

8. The multiprocessor system of claim 3 wherein said first processor distributes different subportions of said initialization code to the other processors.

5. A multiprocessor system comprising:

a plurality of processors for processing data;

a memory for storing an initialization code;

means for acquiring and executing a first portion of said initialization code by each of the plurality of processors;

means for acquiring and executing a second portion of said initialization code by a first processor that obtains a master flag from a shared memory connected to all of said plurality of processors while denying access to said second portion to all remaining processors;

means for initializing overall system test and configuration including means for synchronizing the remaining processors, means for initializing and updating dialog structures for all processors, said dialog structures indicating levels of functionality of each of the plurality of processors; and

means, using said first processor to distribute subportions of said second portion of said initialization code to other processors for execution, for configuring the multiprocessor system.

6. The multiprocessor system of claim 5 including means for acquiring and executing said first portion of initialization code from the shared memory.

9. The multiprocessor system of claim 5 wherein said first processor distributes different subportions of said initialization code to the other processors.