Rapid switching input-output couplers for high rate data transfer buses

• US 5,644,254 A
• Filed: 01/31/1996
• Issued: 07/01/1997
• Est. Priority Date: 02/08/1995
• Status: Expired due to Fees

• Current Assignee: Bull Sas (Atos SE)
• Original Assignee: Bull Sas (Atos SE)
• Inventors: Boudry, Jean-Marie
• Primary Examiner(s): Hudspeth, David R.
• Application Number:
  US08/595,003
• Time in Patent Office: 517 Days
• Field of Search: 326/27, 326/30, 326/62, 326/86
• US Class Current: 326/62
• CPC Class Codes: H03K 19/00361 in field effect transistor circuits
• CPC Class Codes: H04L 25/0278 Arrangements for impedance matching
• CPC Class Codes: H04L 25/028 Arrangements specific to the transmitter end
• CPC Class Codes: H04L 25/0292 Arrangements specific to the receiver end

Abstract

The invention relates to the field of rapid switching input-output couplers for high rate data transfer buses. The input-output coupler of an integrated circuit enables signals to be exchanged with identical couplers disposed in other integrated circuits by means of a bus line (51). Such a coupler comprises a transmitter (6) and a receiver (7) connected to a line (51) by a first conductor (5). The transmitter (6) comprises a first switch (63) whose on condition puts the first conductor (5) at a potential Vb. The coupler comprises additionally a second switch (64) or (65) whose on condition switches the first conductor (5) to a potential Vtt and arranged such that the switching on of the second switch is only possible after the switching off of the first switch (63). Accordingly, rapid switching on of the second switch (64) or (65), enables rapid variations to be obtained between two discrete states of potential Vb and Vtt of the electrical conductor connecting the transmitter to the bus line, with high stability in each of these two states.

Claims

1. An input-output coupler for an integrated circuit, for exchanging signals with at least two identical couplers of other integrated circuits through a bus line (51) having a characteristic impedance, comprising a transmitter (6) and a receiver (7) connected to the bus line (51) through a first conductor (5), the transmitter (6) comprising a first switch (63) having an on and an off condition, said first switch (63) in said on condition adapted to take the first conductor (5) to a potential Vb and in said off condition adapted to take said first conductor (5) to a potential different than Vb propagated along said bus line (51), at least one second switch (64), (65) having an on and an off condition, said second switch in the on condition adapted to take the first conductor (5) to a potential Vtt, and said second switch being so constructed and arranged such that switching on of the second switch (64), (65) is only possible after the first switch (63) has been switched to the off condition.

2. An input-output coupler according to claim 1, characterized in that the second switch (64) is switched to the on condition when the potential of the first conductor (5) exceeds a threshold beyond the potential Vtt.

3. An input-output coupler according to claim 1, including means for generating a first command for switching on the second switch (65), means for generating a second command for blocking said first command and for switching said first switch (63) to its on condition, and means for unblocking said first command after an infinitesimal delay when the first switch (63) is switched to an off condition.

4. An input-output coupler according to claim 3, including means for generating a first command for switching on the first switch (63), means for generating a second command for blocking said first command and for switching on the second switch (65), and means for unblocking said first command after an infinitesimal delay when the second switch (65) is switched to an off condition.

5. An input-output coupler according to claim 3, further comprising a logic gate for providing the infinitesimal delay after the first switch (63) is switched to an off condition.

6. An input-output coupler according to claim 4, further comprising a logic gate (66) for providing the infinitesimal delay after the first switch (63) is switched to the off condition.

8. An input-output coupler according to claim 2, characterized in when the second switch (64) is in the on condition, electrical conductivity of the second switch increases with the potential of the first conductor (5).

9. An input-output coupler according to claim 2, characterized in that the second switch (64) comprises an MOS transistor having a drain connected to a second conductor (55) at a potential Vtt and a gate and source connected to the first conductor (5).

11. An input-output coupler according to claim 3, characterized in that the second switch (64) comprises an MOS transistor having a drain connected to a second conductor (55) at a potential Vtt and a gate and source connected to the first conductor (5).

12. An input-output coupler according to claim 4, characterized in that the second switch (64) comprises an MOS transistor having a drain connected to a second conductor (55) at a potential Vtt and a gate and source connected to the first conductor (5).

13. An input-output coupler according to claim 5, characterized in that the second switch (64) comprises an MOS transistor having a drain connected to a second conductor (55) at a potential Vtt and a gate and source connected to the first conductor (5).

14. An input-output coupler according to claim 6, characterized in that the second switch (64) comprises an MOS transistor having a drain connected to a second conductor (55) at a potential Vtt and a gate and source connected to the first conductor (5).

16. An input-output coupler according to claim 8, characterized in that the second switch (64) comprises an MOS transistor having a drain connected to a second conductor (55) at a potential Vtt and a gate and source connected to the first conductor (5).

7. An input-output coupler according to claim l, further comprising a second conductor (55) and an impedance switch (92, 93), connected between the first conductor (5) and second conductor (55), said impedance switch having an on and an off condition and an impedance equal to the characteristic impedance of the bus line (51), the impedance switch being in an on condition when the coupler is situated at one of the ends of the bus line (51) in a non-transmission mode.

10. An input-output coupler according to claim 7, characterized in that the impedance switch (92, 93) comprises MOS transistors.

15. An input-output coupler according to claim 7, characterized in that the second switch (64) comprises an MOS transistor having a drain connected to a second conductor (55) at a potential Vtt and a gate and source connected to the first conductor (5).

17. An input-output coupler according to claim 10, characterized in that the second switch (64) comprises an MOS transistor having a drain connected to a second conductor (55) at a potential Vtt and a gate and source connected to the first conductor (5).