Media pipeline with multichannel video processing and playback

• US 5,644,364 A
• Filed: 03/06/1995
• Issued: 07/01/1997
• Est. Priority Date: 04/16/1993
• Status: Expired due to Term

• Current Assignee: Avid Technology Incorporated
• Original Assignee: Avid Technology Incorporated
• Inventors: Walsh, John Jr., Peters, Eric C., Kurtze, Jeffrey, Zawojski, Peter, Cacciatore, Ray
• Primary Examiner(s): Peng, John K.
• Assistant Examiner(s): Flynn, Nathan J.
• Application Number:
  US08/347,394
• Time in Patent Office: 848 Days
• Field of Search: 348/595, 348/597, 348/584, 348/578, 348/590, 348/598, 348/601
• US Class Current: 348/584
• CPC Class Codes: G11B 27/031 Electronic editing of digitised analogue information signals, e.g. audio or video signals
• CPC Class Codes: H04N 19/00 Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
• CPC Class Codes: H04N 19/48 using compressed domain processing techniques other than decoding, e.g. modification of transform coefficients, variable length coding [VLC] data or run-length data motion estimation in a transform domain H04N19/547; processing of decoded motion vectors H04N19/513
• CPC Class Codes: H04N 19/90 using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
• CPC Class Codes: H04N 21/2365 Multiplexing of several video streams
• CPC Class Codes: H04N 21/242 Synchronization processes, e.g. processing of PCR [Program Clock References] arrangements for synchronising broadcast or distribution via plural systems in broadcast distribution systems H04H20/18
• CPC Class Codes: H04N 21/431 Generation of visual interfaces for content selection or interaction; Content or additional data rendering
• CPC Class Codes: H04N 21/4347 Demultiplexing of several video streams
• CPC Class Codes: H04N 21/44004 involving video buffer management, e.g. video decoder buffer or video display buffer
• CPC Class Codes: H04N 21/8153 comprising still images, e.g. texture, background image
• CPC Class Codes: H04N 5/262 Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
• CPC Class Codes: H04N 5/265 Mixing

Abstract

The invention improves over the prior art by providing a media pipeline with two channels for processing sequences of digital still images. A blender is provided so as to enable simple effects on these two streams of video data such as dissolves, wipes and chroma keys. Complex arbitrary three-dimensional effects and other effects may also be provided using an external interface.

Thus, a system for processing sequences of digital still images to provide real-time digital video effects includes first and second channels for communicating first and second sequences of digital still images at a rate for simulating video. A controller directs still images to one of the first and second channels. A blender, having a first input connected to the first channel, a second input connected to the second channel, and an output, provides a combination of the first and second sequences of digital still images at a rate for simulating video.

Claims

1. A circuit for processing first and second sequences of digital still images defining motion video to provide digital video effects, using a video encoder having an input for receiving digital video information defining digital still images and an output providing a motion video signal according to the digital still images and having a frequency and synchronization signals associated with the frequency and the size of an image represented by the motion video signal and an output indicating a demand for data when data can be received by the input, the circuit comprising:

a first buffer for receiving, storing and communicating digital video information defining pixels of the first sequence of digital still images;

a second buffer for receiving, storing and communicating digital video information defining pixels of the second sequence of digital still images;

a first controller for receiving and directing digital video information defining the first and second sequences of digital still images to one of the first and second buffers respectively, and for maintaining valid data in the first and second buffers to allow reading of data from the first and second buffers;

a blender having a first input connected to the first buffer, a second input connected to the second buffer and an output providing digital video information defining pixels of a combination of pixels in the first and second sequences of digital still images; and

a second controller having an input connected to receive the output from the video encoder indicating demands for data and for reading digital information from the first and second buffers into the first and second inputs of the blender according to availability of valid data in the first and second buffers and demands for data from the video encoder.

2. The circuit of claim 1, further comprising a frame buffer having an input connected to the output of the blender and an output connected to the input of the video encoder to communicate the digital video information output by the blender to the video encoder.

3. The circuit of claim 1, wherein each of the first and second buffers is a first-in, first-out memory circuit.

4. The circuit of claim 1, wherein each of the first and second buffers comprises an input for receiving compressed digital still images into a first buffer memory, a decompression circuit having an input for receiving the compressed digital still images and an output providing decompressed digital still images to a second buffer memory, wherein the second buffer memory communicates the decompressed digital still images to the blender.

5. The circuit of claim 4, wherein the decompression circuit is a circuit which receives and decompresses images compressed according to JPEG standard.

6. The circuit of claim 1, wherein the first buffer is connected to a first input of a digital video effects system and the output of the blender is connected to a second input of the digital video effects system and the output of the digital video effects system is connected to a frame buffer, wherein the blender is programmable so as to communicate the sequence of digital still images of the second buffer to the output of the blender without blending with the sequence of digital still images of the first buffer.

7. The circuit of claim 1, wherein the controller in the blender comprises an addressing and alpha information unit which receives an indication of an effect to be performed and provides a value α

to the blender for each pair of pixels to be blended according to the indicated effect wherein the blender performs a blending function on a first pixel A from the first channel and a second pixel B from the second channel such that the output of the blender is α

A+(1-α

)B.

9. The circuit of claim 1, wherein the first controller transfers pixels to the first and second buffers so as to align pixels to be combined by the blender.

10. The circuit of claim 1, wherein the second controller includes means for addressing the first and second buffers according to scanlines and whether valid data is available.

11. The circuit of claim 1, wherein the second controller further controls operation of the blender according to user input to generate each frame of an output sequence at user-selectable times.

12. The circuit of claim 11, wherein the second controller includes means for temporarily pausing operation of the blender.

8. A method for blending first and second sequences of digital still images without timing signals and defining motion video to create a third sequence of digital still images without timing signals and defining motion video, comprising the steps of:

periodically transferring pixel data of images from the first and second sequences into first and second buffer circuits to maintain valid data in the first and second buffer circuits according to demand for the pixel data;

receiving an indication of a blend operation to be performed on the images;

sequentially reading corresponding pairs of pixels of each of the images from the first and second sequences from the first and second buffer circuits according to availability of valid data in the first and second buffer circuits and demand for the pixel data in the third sequence of digital still images;

selecting a blending factor according to the indicated blend operation and a relative position of a combination of the selected pixels in the desired output image; and

blending the selected pixels according to the selected factor to generate pixels in the image of the third sequence desired output.

13. The method of claim 8, wherein the step of transferring includes transferring pixels to the buffer circuits so as to align pixels to be combined in the step of blending.

14. The method of claim 8, wherein the step of blending includes addressing the first and second buffers according to scanlines and whether valid data is available.

15. The circuit of claim 8, further comprising the step of controlling the step of blending according to user input to generate each frame of an output sequence at user-selectable times.

16. The circuit of claim 15, wherein the step of controlling includes the step of temporarily pausing the step of blending.