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Programmable logic device with internal time-constant multiplexing of signals from external interconnect buses

  • US 5,644,496 A
  • Filed: 06/18/1993
  • Issued: 07/01/1997
  • Est. Priority Date: 08/15/1989
  • Status: Expired due to Term
First Claim
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1. A user-programmable device comprising:

  • (a) a monolithic substrate having logic and interconnect circuitry provided thereon;

    (b) a first plurality of first through Nth Input/Output Blocks (IOB'"'"'s) provided on the substrate for receiving output signals of the substrate interconnect circuitry and coupling the output signals to points outside the substrate, and for receiving input signals from points outside the substrate and supplying the received input signals to the substrate interconnect circuitry;

    (c) where the substrate interconnect circuitry includes at least one longline bus extending over or next to the first plurality of IOB'"'"'s, the at least one longline bus having first through Mth longlines, each extending over or next to the first plurality of IOB'"'"'s;

    (d) where the Substrate interconnect circuitry further includes bus multiplexing means for selectively coupling respective ones of the first plurality of N IOB'"'"'s bidirectionally to preselected ones of the first through Mth longlines of the at least one longline bus, the bus multiplexing means providing selective bidirectional coupling between at least one of the longlines in the at least one longline bus and a programmably selected one or the other of two IOB'"'"'s among said first plurality of IOB'"'"'s such that signal propagation delay between the at least one longline and the programmably selected one or another of said two IOB'"'"'s is substantially the same irrespective of which of the two IOB'"'"'s is selected; and

    (e) where said logic includes a first plurality of first through Kth logic blocks (CLB'"'"'s) operatively coupled to respective ones of the first through Mth longlines of the at least one longline bus.

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