Method and apparatus for bias suppression in a VCO based FM transmission system
First Claim
1. A transmitter for generating radio frequency signals comprising bias suppression encoder means for minimizing the DC bias of a digital signal and generating an encoded digital signal having a minimized DC bias thereby and a closed loop VCO for generating a time variant frequency signal from said encoded digital signal, wherein said bias suppression encoder means comprises:
- stuff bit injecting means for adding a stuff bit to an N-bit block of said digital signal to produce an (N+1) bit block of an injected digital signal;
DC bias accumulation means for generating a running sum of the logic states of said encoded digital signal;
(N+1)-bit DC bias accumulation means for generating an (N+1)-bit sum of the logic states of said (N+1)-bit block of said injected digital signal;
polarity detector means for detecting whether the polarities of said running sum and said (N+1)-bit are the same; and
inverter means for inverting said (N+1)-bit block of said injected digital signal when said polarity detector means detects that said running sum and said (N+1)-bit sum are the same polarity, thereby generating said encoded digital signal.
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Abstract
A method and apparatus for bias suppression which includes a transmitter having a bias suppression encoder and a closed-loop VCO FM modulator and a receiver having a bias suppression decoder and an AC coupled FM demodulator. The bias suppression encoder generates a running sum of an encoded digital data signal as well as the sum of an (N+1)-bit block of an injected digital data signal such that the encoder may invert a block of (N+1)-bits of the injected data signal if both sums are of the same polarity thereby reducing the average DC bias of the encoded digital data signal. The encoded data signal is modulated using a closed-loop VCO FM modulator with the DC tracking effect minimized as compared to modulating the non-encoded signal directly.
79 Citations
5 Claims
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1. A transmitter for generating radio frequency signals comprising bias suppression encoder means for minimizing the DC bias of a digital signal and generating an encoded digital signal having a minimized DC bias thereby and a closed loop VCO for generating a time variant frequency signal from said encoded digital signal, wherein said bias suppression encoder means comprises:
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stuff bit injecting means for adding a stuff bit to an N-bit block of said digital signal to produce an (N+1) bit block of an injected digital signal; DC bias accumulation means for generating a running sum of the logic states of said encoded digital signal; (N+1)-bit DC bias accumulation means for generating an (N+1)-bit sum of the logic states of said (N+1)-bit block of said injected digital signal; polarity detector means for detecting whether the polarities of said running sum and said (N+1)-bit are the same; and inverter means for inverting said (N+1)-bit block of said injected digital signal when said polarity detector means detects that said running sum and said (N+1)-bit sum are the same polarity, thereby generating said encoded digital signal. - View Dependent Claims (2, 3, 4)
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5. A method of transmitting a radio frequency signal having minimized DC bias comprising the steps of:
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a. generating from a digital signal an encoded digital signal having a minimized DC bias; b. generating a time variant frequency signal from said encoded digital signal using a closed loop VCO; and c. transmitting said time variant frequency signal over a communication channel; wherein the step of generating from a digital signal an encoded digital signal having a minimized DC bias further comprises the steps of; (i). adding a stuff bit, having a logic state which is initially false, to an N-bit block of said digital signal and generating an (N+1)-bit block of an injected digital signal thereby; (ii). determining the running sum of said encoded digital signal; (iii). determining the (N+1)-bit sum of said (N+1)-bit block of said injected digital signal; (iv). determining whether the running sum and the (N+1)-bit sum are the same polarity; and (v). inverting said (N+1)-bit block of said injected digital signal if the running sum of the encoded digital signal and the (N+1)-bit sum of said (N+1)-bit block of said injected digital signal are of the same polarity, thereby generating said encoded digital signal.
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Specification