Method and apparatus for verifying the contents of a storage device

• US 5,644,704 A
• Filed: 11/30/1994
• Issued: 07/01/1997
• Est. Priority Date: 11/30/1994
• Status: Expired due to Term

• Current Assignee: International Game Technology
• Original Assignee: International Game Technology
• Inventors: Richard, Delbert, Dickinson, deceased, Peter D., Pease, Logan L.
• Primary Examiner(s): Beausoliel, Jr., Robert W.
• Assistant Examiner(s): HUA, LY
• Application Number:
  US08/348,268
• Time in Patent Office: 944 Days
• Field of Search: 395/183.18, 395/183.16, 395/183.01, 395/185.01, 395/185.07, 395/421.08, 371/21.1, 371/21.5, 371/37.7
• US Class Current: 714/42
• CPC Class Codes: G11C 29/10 Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents

Abstract

A method and apparatus for verifying the contents of a storage device. A number of steps are involved in performing the verification. First, non-sequential data is written into each unused memory location of the storage device. Then, a non-associative technique is performed on contents of each memory location in the storage device starting at a randomly determined address in the storage device. Next, a final value from the non-associative technique is provided to a confirmation device for comparison with a set of predetermined resulting values. Then, the final value is compared to a resulting value, the resulting value being predetermined by applying the non-associative technique to pre-programmed contents of the storage device. Finally, one of two signals is generated. A first signal is generated indicating that the contents of the storage device are corrupted if the final value does not correspond to the resulting value. Alternatively, a second signal is generated indicating the contents of the storage device are uncorrupted if the final value corresponds to the resulting value.

Claims

1. A method of verifying the contents of a computer storage device, comprising:

writing non-sequential data into each unused memory location of the storage device;

performing a non-associative technique on contents of each memory location in the storage device starting at a randomly determined address in the storage device;

providing a final value from the non-associative technique to a confirmation device for comparison with a set of predetermined resulting values;

comparing the final value to a resulting value, the resulting value being predetermined by applying the non-associative technique to pre-programmed contents of the storage device; and

generating a first signal indicating the contents of the storage device are corrupted if the final value does not correspond to the resulting value or a second signal indicating the contents of the storage device are uncorrupted if the final value corresponds to the resulting value.

2. The method of claim 1 wherein the non-associative technique is applied sequentially starting at the randomly determined address through a last address in the storage device before wrapping around to a first address and continuing until an address preceding the randomly determined address is reached.

3. The method of claim 1 wherein the non-associative technique is applied in reverse sequence starting at the randomly determined address through a first address in the storage device before wrapping around to a last address and continuing until an address following the randomly determined address is reached.

4. The method of claim 1 wherein the non-associative technique is a cyclical redundancy check.

5. The method of claim 1 wherein the confirmation device is independent from a device in which the storage device is integrated.

6. The method of claim 5 wherein the confirmation device is a processor connectible to the device in which the storage device is integrated as part of a network of machines at a remote location.

7. The method of claim 5 wherein the confirmation device is a processor connectible to the device in which the storage device is integrated via a modem.

8. The method of claim 5 wherein the confirmation device is a processor connectible to the device in which the storage device is integrated via cable substantially near the device in which the storage device is integrated.

9. A computer programmed to verify the contents of a storage device, wherein the storage device includes a first portion for storing a program or data, and a second portion for storing non-sequential data, comprising:

a memory for storing a predetermined set of resulting values, such that each of the resulting values corresponds to results of a non-associative technique performed by starting the non-associative technique at a different starting address in the memory;

a communications device for transmitting data to and receiving data from a storage device under verification test;

a processor connected to the memory and the communications device for accessing contents of addresses in the first and second portions of the storage device and performing the non-associative technique on the contents to provide a unique final value dependent upon a random starting address selected to perform the non-associative technique, and for comparing the unique final value and a corresponding resulting value obtained from the memory, the processor generating a first signal indicating the contents of the storage device have been corrupted if the final value does not correspond to the resulting value or a second signal indicating the contents of the storage device are uncorrupted if the final value corresponds to the resulting value.

10. The apparatus of claim 9 wherein the non-associative technique is applied sequentially starting at the randomly determined address through a last address in the storage device before wrapping around to a first address and continuing until an address preceding the randomly determined address is reached.

11. The apparatus of claim 9 wherein the non-associative technique is applied in reverse sequence starting at the randomly determined address through a first address in the storage device before wrapping around to a last address and continuing until an address following the randomly determined address is reached.

12. The apparatus of claim 9 wherein the non-associative technique is a cyclical redundancy check.

13. The apparatus of claim 9 wherein the confirmation device is independent from a device in which the storage device is integrated.

14. The apparatus of claim 13 wherein the confirmation device is a processor connectible to the device in which the storage device is integrated as part of a network of machines at a remote location.

15. The apparatus of claim 13 wherein the confirmation device is a processor connectible to the device in which the storage device is integrated via a modem.

16. The apparatus of claim 13 wherein the confirmation device is a processor connectible to the device in which the storage device is integrated via cable substantially near the device in which the storage device is integrated.

17. An apparatus for verifying the contents of a computer storage device, comprising:

a write circuit for writing non-sequential data into each unused storage device location of the storage device;

a processor for performing a non-associative technique on contents of each storage device location in the storage device starting at a randomly determined address in the storage device;

a circuit for providing a final value from the non-associative technique to a confirmation device for comparison with a set of predetermined resulting values; and

a comparator for comparing the final value to a resulting value, the resulting value being predetermined by applying the non-associative technique to pre-programmed contents of the storage device wherein the comparator generates a first signal indicating the contents of the storage device are corrupted if the final value does not correspond to the resulting value or a second signal indicating the contents of the storage device are uncorrupted if the final value corresponds to the resulting value.

18. The apparatus of claim 17 wherein the non-associative technique is applied sequentially starting at the randomly determined address through a last address in the storage device before wrapping around to a first address and continuing until an address preceding the randomly determined address is reached.

19. The apparatus of claim 17 wherein the non-associative technique is applied in reverse sequence starting at the randomly determined address through a first address in the storage device before wrapping around to a last address and continuing until an address following the randomly determined address is reached.

20. The apparatus of claim 17 wherein the non-associative technique is a cyclical redundancy check.

21. The apparatus of claim 17 wherein the confirmation device is an independent device remote from a device in which the storage device is integrated.