Zener programmable read only memory

• US 5,646,879 A
• Filed: 12/01/1994
• Issued: 07/08/1997
• Est. Priority Date: 08/20/1993
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Harshfield, Steven T.
• Primary Examiner(s): Limanek, Robert P.
• Application Number:
  US08/348,647
• Time in Patent Office: 950 Days
• Field of Search: 257/530, 257/529, 365/96
• US Class Current: 365/105
• CPC Class Codes: G11C 13/003 Cell access
• CPC Class Codes: G11C 17/16 using electrically-fusible links
• CPC Class Codes: G11C 17/165 Memory cells which are electrically programmed to cause a change in resistance, e.g. to permit multiple resistance steps to be programmed rather than conduct to or from non-conduct change of fuses and antifuses digital stores using resistance random access memory elements G11C13/0002
• CPC Class Codes: G11C 2213/76 Array using an access device for each cell which being not a transistor and not a diode
• CPC Class Codes: H01L 23/5252 comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present invention teaches a memory comprising an array of memory cells. Each cell of the array in the memory comprises a bus, and a diode, preferably a zener diode, having a substantially low breakdown voltage. Further, each cell comprises a programmable element, preferably an antifuse, for selectively coupling the diode with the bus.

Claims

1. An integrated circuit comprising a diode array, the diode array comprising:

a. a diode for conducting a reverse current when reverse biased and for conducting a forward current when forward biased; and

b. an antifuse coupled in series with the diode, the antifuse being programmed by the reverse current.

2. The integrated circuit of claim 1 further comprising reading means coupled to the cell, the reading means in operation forward biasing the diode so that operation of the integrated circuit is responsive to a portion of the forward current flowing through the antifuse.

3. The integrated circuit of claim 1 wherein the diode comprises a zener diode.

4. The integrated circuit of claim 3 wherein the zener diode is characterized by a zener voltage of less than seven volts.

5. The integrated circuit of claim 1 wherein the diode is characterized by a reverse breakdown voltage of less than seven volts.

6. The integrated circuit of claim 1 wherein the diode is characterized by a first capacitance;

and the antifuse is characterized by a second capacitance, the second capacitance being greater than the first capacitance.

7. A programmable memory comprising an array of memory cells, each cell of the plurality comprising:

a. a diode for conducting a reverse current when reverse biased and for conducting a forward current when forward biased; and

b. a fuse coupled in series with the diode, the fuse being programmed by the reverse current.

8. The programmable memory of claim 7 further comprising reading means coupled to the cell, the reading means in operation forward biasing the diode so that operation of the integrated circuit is responsive to a lack of forward current flowing through the fuse.

9. The integrated circuit of claim 7 wherein the diode comprises a zener diode.

10. The integrated circuit of claim 9 wherein the zener diode is characterized by a zener voltage of less than seven volts.

11. The integrated circuit of claim 7 wherein the diode is characterized by a reverse breakdown voltage of less than seven volts.

12. The integrated circuit of claim 7 wherein the diode is characterized by a first capacitance;

and the antifuse is characterized by a second capacitance, the second capacitance being greater than the first capacitance.

13. A programmable logic array responsive to an input, the array comprising:

a. a diode for conducting a reverse current when reverse biased and for conducting a forward current when forward biased; and

b. an antifuse coupled in series with the diode, the antifuse being programmed by the reverse current.

14. The programmable logic array of claim 13 further comprising a circuit for providing an output responsive to the input, the circuit in operation forward biasing the diode so that the output is provided further responsive to a portion of the forward current flowing through the antifuse.

15. The integrated circuit of claim 13 wherein the diode comprises a zener diode.

16. The integrated circuit of claim 15 wherein the zener diode is characterized by a zener voltage of less than seven volts.

17. The integrated circuit of claim 13 wherein the diode is characterized by a reverse breakdown voltage of less than seven volts.

18. The integrated circuit of claim 13 wherein the diode is characterized by a first capacitance;

and the antifuse is characterized by a second capacitance, the second capacitance being greater than the first capacitance.