Lateral thin-film SOI devices with linearly-graded field oxide and linear doping profile

• US 5,648,671 A
• Filed: 12/13/1995
• Issued: 07/15/1997
• Est. Priority Date: 12/13/1995
• Status: Expired due to Term

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Inventors: Merchant, Steven L.
• Primary Examiner(s): Crane, Sara W.
• Assistant Examiner(s): Hardy, David B.
• Application Number:
  US08/571,486
• Time in Patent Office: 580 Days
• Field of Search: 257/347, 257/404, 257/409, 257/350, 257/655, 257/327, 257/345, 257/401, 257/411
• US Class Current: 257/347
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/0852 of DMOS transistors
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/78624 the source and the drain regions being asymmetrical
• CPC Class Codes: H01L 29/861 Diodes

Abstract

A lateral thin-film silicon-on-insulator (SOI) device includes a lateral semiconductor device such as a diode or MOSFET provided in a thin semiconductor film on a thin buried oxide. The lateral semiconductor device structure includes at least two semiconductor regions separated by a lateral drift region. By providing a substantially linear lateral doping profile in the lateral drift region, and by providing a conductive field plate on a linearly-graded top oxide insulating layer, a device structure is obtained in which conduction losses can be reduced without reducing breakdown voltage.

Claims

1. A lateral thin-film Silicon-On-Insulator (SOI) device comprising a semiconductor substrate, a thin buried oxide insulating layer on said substrate, and a lateral semiconductor device provided in a thin semiconductor film on said thin buried oxide, said thin semiconductor film comprising a first region of a first conductivity type, a second region of a second conductivity type opposite to that of the first and spaced apart from said first region by a lateral drift region of said second conductivity type having a substantially linear lateral doping profile, a top oxide insulating layer over said thin semiconductor film and having a substantially linearly-graded portion over a major portion of said lateral drift region which increases in thickness from adjacent said first region to adjacent said second region, and a conductive field plate on at least said linearly-graded portion of said top oxide insulating layer.

2. A lateral thin-film Silicon-On-Insulator (SOI) device as claimed in claim 1, wherein said device comprises a diode, said field plate is connected to said first region, which forms a first electrode of said diode, and said second region forms a second electrode of said diode.

3. A lateral thin-film Silicon-On-Insulator (SOI) device as in claim 2, wherein a maximum thickness of said top oxide insulating layer is substantially equal to a thickness of said thin buried oxide insulating layer.

4. A lateral thin-film Silicon-On-Insulator (SOI) device as claimed in claim 1, wherein said device comprises a MOSFET, said thin semiconductor film further comprises a third region of said second conductivity type alongside said first region at a side thereof remote from said lateral drift region, said conductive field plate extends over and is insulated from said first region to form a gate electrode of said MOSFET, and said third and second regions form a source and a drain region of said MOSFET.

5. A lateral thin-film Silicon-On-Insulator (SOI) device as in claim 4, wherein a maximum thickness of said top oxide insulating layer is substantially equal to a thickness of said thin buried oxide insulating layer.

6. A lateral thin-film Silicon-On-Insulator (SOI) device as claimed in claim 1, wherein the doping level of said lateral drift region increases linearly in a direction from said first region to said second region.

7. A lateral thin-film Silicon-On-Insulator (SOI) device as in claim 6, wherein said doping level increases linearly by a factor of at least about 100.