Method of making asymmetric low power MOS devices
First Claim
1. A method of forming an asymmetric MOS transistor on a semiconductor substrate, the method comprising the following steps:
- forming a bulk region having a first conductivity type;
forming a gate over a portion of said bulk region defining a channel region, wherein the conditions employed to form the gate and the channel region are such that the MOS transistor has an absolute threshold voltage between about -150 and about +150 millivolts;
performing an asymmetric halo implant which implants dopant atoms of said first conductivity type to form a pocket region on a first side of said channel region but not on a second side of said channel region; and
forming source and drain regions of a second conductivity type separated by the channel region, wherein the pocket region of the first conductivity type abuts at least a portion of one of said source and drain regions and proximate said channel region effectively creating two pseudo-metal oxide semiconductor devices connected in series, a first pseudo device disposed away from the pocket region and having a first threshold voltage and a second pseudo device located proximate the pocket region and having a second threshold voltage which is higher in magnitude than the first threshold voltage, wherein the second pseudo device has a second effective channel length that is shorter than a first effective channel length of the first pseudo device and a substantial number of carriers can be transported across the channel of said second pseudo device ballistically.
0 Assignments
0 Petitions
Accused Products
Abstract
Low threshold voltage MOS devices having asymmetric halo implants are disclosed herein. An asymmetric halo implant provides a pocket region located under a device'"'"'s source or drain near where the source (or drain) edge abuts the device'"'"'s channel region. The pocket region has the same conductivity type as the device'"'"'s bulk (albeit at a higher dopant concentration) and, of course, the opposite conductivity type as the device'"'"'s source and drain. Only the source or drain, not both, have the primary pocket region. An asymmetric halo device behaves like two pseudo-MOS devices in series: a "source FET" and a "drain FET." If the pocket implant is located under the source, the source FET will have a higher threshold voltage and a much shorter effective channel length than the drain FET.
-
Citations
15 Claims
-
1. A method of forming an asymmetric MOS transistor on a semiconductor substrate, the method comprising the following steps:
-
forming a bulk region having a first conductivity type; forming a gate over a portion of said bulk region defining a channel region, wherein the conditions employed to form the gate and the channel region are such that the MOS transistor has an absolute threshold voltage between about -150 and about +150 millivolts; performing an asymmetric halo implant which implants dopant atoms of said first conductivity type to form a pocket region on a first side of said channel region but not on a second side of said channel region; and forming source and drain regions of a second conductivity type separated by the channel region, wherein the pocket region of the first conductivity type abuts at least a portion of one of said source and drain regions and proximate said channel region effectively creating two pseudo-metal oxide semiconductor devices connected in series, a first pseudo device disposed away from the pocket region and having a first threshold voltage and a second pseudo device located proximate the pocket region and having a second threshold voltage which is higher in magnitude than the first threshold voltage, wherein the second pseudo device has a second effective channel length that is shorter than a first effective channel length of the first pseudo device and a substantial number of carriers can be transported across the channel of said second pseudo device ballistically. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A method of forming an asymmetric MOS transistor on a semiconductor substrate, the method comprising the following steps:
-
forming a bulk region having a first conductivity type; forming a gate over a portion of said bulk region defining a channel region; forming source and drain tip regions of a second conductivity type separated by the channel region; forming a first spacer on the sides of said gate; performing an asymmetric halo implant which implants dopant atoms of said first conductivity type to form a pocket region on a first side of said channel region but not on a second side of said channel region, wherein the step of performing the asymmetric halo implant comes after the step of forming the first spacer; forming a second spacer on the sides of the first spacer; and forming source and drain plug regions by conducting a second implant of said second conductivity type on either side the second spacer, wherein the pocket region abuts at least a portion of one of said source and drain plug regions and proximate said channel region effectively creating two pseudo-metal oxide semiconductor devices connected in series, a first pseudo device disposed away from the pocket region and having a first threshold voltage and a second pseudo device located proximate the pocket region and having a second threshold voltage which is higher in magnitude than the first threshold voltage, the second pseudo device has a second effective channel length that is shorter than a first effective channel length of the first pseudo device and a substantial number of carriers can be transported across the channel of said second pseudo device ballistically. - View Dependent Claims (11, 12, 13, 14, 15)
-
Specification