FM demodulator using injection locked oscillator having tuning feedback and linearizing feedback

• US 5,650,749 A
• Filed: 06/10/1996
• Issued: 07/22/1997
• Est. Priority Date: 06/10/1996
• Status: Expired due to Term

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Main, William Eric
• Primary Examiner(s): MIS, DAVID C
• Application Number:
  US08/660,828
• Time in Patent Office: 407 Days
• Field of Search: 529/323-326, 331/23, 455/205, 455/208, 455/214, 455/337
• US Class Current: 329/324
• CPC Class Codes: H03D 3/24 Modifications of demodulators to reject or remove amplitude variations by means of locked-in oscillator circuits
• CPC Class Codes: H03L 7/083 the reference signal being additionally directly applied to the generator
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence

Abstract

A demodulator circuit (100) and method for producing a demodulated signal V_OUT from an input signal V_IN. A frequency detection circuit (101) produces a quadrature signal V_QUAD which is compared to the input signal V_IN to produce a detected output signal. The phase and frequency of the quadrature signal V_QUAD are responsive to a control signal I_CONTROL. The demodulator circuit (100) has an output terminal (114) which provides the demodulated signal V_OUT. Nonlinearity in the demodulated output signal V_OUT in relation to a modulating signal is reduced by a linearizing feedback circuit (102). Automatic tuning is provided by a tuning feedback circuit (103). The output signals produced at the respective output terminals (114) and (113) of the linearizing feedback circuit (102) and tuning feedback circuit (103) are summed to produce the control current I_CONTROL.

Claims

1. A demodulator circuit, comprising:

an injection locked oscillator having a first input coupled for receiving an input signal, and an output;

a phase detector circuit having first and second inputs respectively coupled to the first input and output of the injection locked oscillator, and an output for providing an output signal;

a linearizing feedback circuit having an input coupled to the output of the phase detector circuit and an output which serves as an output of the demodulator circuit;

a tuning feedback circuit having an input coupled to the output of the linearizing feedback and an output; and

a summing circuit having first and second inputs and an output, the first input coupled to the output of the tuning feedback circuit, the second input coupled to the output of the linearizing feedback circuit and the output coupled to a second input of the injection locked oscillator.

2. The demodulator circuit of claim 1, wherein the phase detector circuit further comprises a filter circuit, the filter circuit attenuating frequencies at twice a frequency of the input signal.

3. The demodulator circuit of claim 1, wherein the tuning feedback drcuit comprises a low pass filter coupled to a gain stage.

4. The demodulator circuit of claim 3, wherein the demodulator circuit has a desired frequency band and the low pass filter has a cutoff frequency below the desired frequency band.

5. The demodulator circuit of claim 1, wherein the tuning feedback circuit comprises:

a transistor having an emitter, a base and a collector, the base coupled to the of the linearizing feedback circuit, the collector coupled to the output of the tuning feedback circuit and the emitter coupled for receiving a power supply voltage; and

a capacitor coupled between the base and the collector of the transistor.

6. The demodulator circuit of claim 1, wherein the linearizing feedback circuit comprises:

a transistor having an emitter, a base and a collector, the base coupled to the output of the phase detector circuit, the collector coupled to the output of the linearizing feedback circuit and the emitter coupled for receiving a power supply voltage; and

a resistor coupled between the base and the collector of the transistor.

7. An integrated FM demodulator circuit having an input and an output, the input responsive to an input signal and the output providing an output signal, comprising:

an injection locked oscillator having first and second inputs and an output, the first input responsive to the input signal, the second input responsive to a control signal and the output providing a quadrature signal;

a phase detector circuit having first and second inputs and an output, the first input serving as the input of the integrated FM demodulator circuit, the second input responsive to the quadrature signal and the output providing a detection signal;

an amplifier drcuit having an input and an output, the input responsive to the detection signal and the output serving as the output of the integrated FM demodulator circuit;

a tuning circuit having an input and an output, the input responsive to the detection signal and the output providing a tuning correction signal; and

a summing circuit having first and second inputs and an output, the first input responsive to the output signal of the integrated FM demodulator circuit, the second input responsive to the tuning correction signal and the output providing the control signal.

8. The integrated FM demodulator drcuit of claim 7, wherein the phase detector drcuit comprises a multiplier circuit.

9. The integrated FM demodulator drcuit of claim 8, wherein the multiplier circuit comprises a doubly balanced multiplier circuit.

10. The integrated FM demodulator drcuit of claim 7, wherein the tuning circuit comprises a low pass filter circuit.

11. The integrated FM demodulator circuit of claim 10, wherein the output signal of the integrated FM demodulator circuit has a desired frequency band and a cutoff frequency of the low pass filter circuit is below the desired frequency band.