Program execution control device having addressability in accordance with M series pseudo-random number sequence
First Claim
1. A program execution control device comprising:
- instruction storage means for storing instructions of a program at addresses sequentially designated in accordance with an M series pseudo-random number sequence in the order of program addresses of each instruction,instruction reading means having feedback shift register means for generating said M series pseudo-random number sequence for reading instructions from said instruction storage means by addressing based on generated pseudo-random numbers and instruction execution results; and
decoding means for decoding a read instruction to output a control signal corresponding to the read instruction, while applying a select signal indicating whether a next pseudo-random number or a jump address determined by the read instruction is to be selected and a jump address to said reading means.
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Accused Products
Abstract
Instructions of a program are stored at addresses sequentially designated in accordance with an M series pseudo-random number sequence in an instruction memory in the order of program addresses. A pseudo-random number program counter has a feedback shift register for generating the same M series pseudo-random number sequence and applies an address of an instruction to be read from the instruction memory to the instruction memory based on a generated pseudo-random number, and a jump address and a select signal from an instruction decoder. As a result, instructions are read from the instruction memory and executed in the order of program addresses. The feedback shift register can be implemented as a small-scale circuit and operable at high speed.
36 Citations
7 Claims
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1. A program execution control device comprising:
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instruction storage means for storing instructions of a program at addresses sequentially designated in accordance with an M series pseudo-random number sequence in the order of program addresses of each instruction, instruction reading means having feedback shift register means for generating said M series pseudo-random number sequence for reading instructions from said instruction storage means by addressing based on generated pseudo-random numbers and instruction execution results; and decoding means for decoding a read instruction to output a control signal corresponding to the read instruction, while applying a select signal indicating whether a next pseudo-random number or a jump address determined by the read instruction is to be selected and a jump address to said reading means. - View Dependent Claims (2, 3, 4)
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5. A program execution control device comprising:
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program storage means for storing instructions of a program at addresses sequentially designated in accordance with an M series pseudo-random number sequence in the order of program addresses of each instruction, instruction reading means for generating pseudo-random numbers in accordance with said M series pseudo-random number sequence to read instructions from said program storage means, with generated pseudo-random numbers as addresses; and decoding means for decoding said read instruction to execute processing according to the read instruction.
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6. A program execution control method comprising the steps of:
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preparing an instruction memory in which instructions of a program are stored at addresses sequentially designated in accordance with an M series pseudo-random number sequence in the order of program addresses of each instruction; generating pseudo-random numbers by feedback shift register means for generating pseudo-random numbers in accordance with said M series pseudo-random number sequence to read instructions from said instruction memory by addressing based on generated pseudo-random numbers and instruction execution results;
.decoding a read instruction to output a control signal corresponding to the read instruction to a program execution device, while outputting a select signal indicating whether an address designated by a next pseudo-random number or a jump address determined by the read instruction is to be selected and a jump address; and repeatedly executing said reading step and said outputting step until a predetermined condition is satisfied.
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7. A program execution control method comprising the steps of:
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dividing a program into a plurality of segments; dividing an instruction memory into a plurality of segment storage regions; modifying an arrangement of instructions such that instructions included in each of said plurality of segments are rearranged at positions sequentially designated in accordance with an M series pseudo-random number sequence in the order of program addresses; specifying an instruction to be executed by a program execution device; determining whether a segment including an instruction to be executed, out of said plurality of segments including instructions whose arrangement is modified, exists in the instruction memory and when the segment does not exist, loading the segment into a selected segment region out of said plurality of segment regions according to a predetermined condition to read said instruction to be executed from said instruction memory; decoding a read instruction to output a control signal corresponding to the read instruction to the program execution device, while outputting a select signal indicating whether an address designated by a next pseudo-random number or a jump address determined by a decoding result is to be selected and a jump address; generating pseudo-random numbers in accordance with said M series pseudo-random number sequence to specify an instruction to be read next based on the generated pseudo-random numbers, said select signal and said jump address; and repeatedly executing said reading step, said outputting step and said step of specifying an instruction to be read next until a predetermined condition is satisfied.
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Specification